; generated by ARM C/C++ Compiler, 4.1 [Build 894]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\obj\drvi2c.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\drvi2c.d --cpu=Cortex-M0 --apcs=interwork -I..\inc -I..\drv -I..\bsp -I..\bsp\Cmsis -I..\bsp\Driver -I..\bsp\system -I..\lib -I..\lib\libtk -IC:\Keil\ARM\RV31\Inc -IC:\Keil\ARM\CMSIS\Include -D__LCDDISPLAY_BTL001_H --omf_browse=.\obj\drvi2c.crf ..\bsp\Driver\DrvI2C.c]
                          THUMB

                          AREA ||i.DrvI2C_ClearIntFlag||, CODE, READONLY, ALIGN=2

                  DrvI2C_ClearIntFlag PROC
;;;175      */
;;;176    void DrvI2C_ClearIntFlag(E_I2C_PORT port)
000000  0081              LSLS     r1,r0,#2
;;;177    {
;;;178    	I2C_PORT[port]->INTSTS_BITS.STAINTSTS = 1;
000002  4803              LDR      r0,|L1.16|
000004  5840              LDR      r0,[r0,r1]
000006  6841              LDR      r1,[r0,#4]
000008  2201              MOVS     r2,#1
00000a  4311              ORRS     r1,r1,r2
00000c  6041              STR      r1,[r0,#4]
;;;179    }
00000e  4770              BX       lr
;;;180    
                          ENDP

                  |L1.16|
                          DCD      ||.data||

                          AREA ||i.DrvI2C_ClearTimeoutFlag||, CODE, READONLY, ALIGN=2

                  DrvI2C_ClearTimeoutFlag PROC
;;;216      */
;;;217    void DrvI2C_ClearTimeoutFlag(E_I2C_PORT port)
000000  0081              LSLS     r1,r0,#2
;;;218    {
;;;219    	I2C_PORT[port]->INTSTS_BITS.TOUTSTS = 1;
000002  4803              LDR      r0,|L2.16|
000004  5840              LDR      r0,[r0,r1]
000006  6841              LDR      r1,[r0,#4]
000008  2202              MOVS     r2,#2
00000a  4311              ORRS     r1,r1,r2
00000c  6041              STR      r1,[r0,#4]
;;;220    }
00000e  4770              BX       lr
;;;221    
                          ENDP

                  |L2.16|
                          DCD      ||.data||

                          AREA ||i.DrvI2C_Close||, CODE, READONLY, ALIGN=2

                  DrvI2C_Close PROC
;;;267      */
;;;268    int32_t DrvI2C_Close(E_I2C_PORT port)
000000  490d              LDR      r1,|L3.56|
;;;269    {
;;;270        I2C_PORT[port]->CON_BITS.INTEN = 0;
000002  0082              LSLS     r2,r0,#2
000004  5889              LDR      r1,[r1,r2]
000006  680a              LDR      r2,[r1,#0]
000008  2380              MOVS     r3,#0x80
00000a  439a              BICS     r2,r2,r3
00000c  600a              STR      r2,[r1,#0]
;;;271        
;;;272        if (port)
;;;273    	{		
;;;274    		GCR->IPRST_CTL2_BITS.I2C1_RST = 1;
00000e  2105              MOVS     r1,#5
000010  0709              LSLS     r1,r1,#28
;;;275    		GCR->IPRST_CTL2_BITS.I2C1_RST = 0;
;;;276    		CLK->APBCLK_BITS.I2C1_EN = 0;
000012  4a0a              LDR      r2,|L3.60|
;;;277    	}
;;;278    	else
;;;279    	{		
;;;280    		GCR->IPRST_CTL2_BITS.I2C0_RST = 1;
000014  68cb              LDR      r3,[r1,#0xc]
000016  2800              CMP      r0,#0                 ;272
000018  d002              BEQ      |L3.32|
00001a  2001              MOVS     r0,#1                 ;274
00001c  0240              LSLS     r0,r0,#9              ;274
00001e  e001              B        |L3.36|
                  |L3.32|
000020  20ff              MOVS     r0,#0xff
000022  3001              ADDS     r0,#1
                  |L3.36|
000024  4303              ORRS     r3,r3,r0
000026  60cb              STR      r3,[r1,#0xc]
;;;281    		GCR->IPRST_CTL2_BITS.I2C0_RST = 0;
000028  68cb              LDR      r3,[r1,#0xc]
00002a  4383              BICS     r3,r3,r0
00002c  60cb              STR      r3,[r1,#0xc]
;;;282    		CLK->APBCLK_BITS.I2C0_EN = 0;
00002e  6891              LDR      r1,[r2,#8]
000030  4381              BICS     r1,r1,r0
000032  6091              STR      r1,[r2,#8]
;;;283    	}
;;;284    	
;;;285    	return 0;
000034  2000              MOVS     r0,#0
;;;286    }
000036  4770              BX       lr
;;;287    
                          ENDP

                  |L3.56|
                          DCD      ||.data||
                  |L3.60|
                          DCD      0x50000200

                          AREA ||i.DrvI2C_Ctrl||, CODE, READONLY, ALIGN=2

                  DrvI2C_Ctrl PROC
;;;146      */
;;;147    void DrvI2C_Ctrl(E_I2C_PORT port, uint8_t start, uint8_t stop, uint8_t ack)
000000  b510              PUSH     {r4,lr}
;;;148    {	
;;;149    	uint32_t Reg = 0;
000002  2400              MOVS     r4,#0
;;;150    	
;;;151    	if (start)
000004  2900              CMP      r1,#0
000006  d000              BEQ      |L4.10|
;;;152    		Reg |= I2C_STA;
000008  2408              MOVS     r4,#8
                  |L4.10|
;;;153    	if (stop)
00000a  2a00              CMP      r2,#0
00000c  d001              BEQ      |L4.18|
;;;154    	    Reg |= I2C_STO;
00000e  2104              MOVS     r1,#4
000010  430c              ORRS     r4,r4,r1
                  |L4.18|
;;;155    	if (ack)
000012  2b00              CMP      r3,#0
000014  d001              BEQ      |L4.26|
;;;156    		Reg |= I2C_AA;
000016  2102              MOVS     r1,#2
000018  430c              ORRS     r4,r4,r1
                  |L4.26|
;;;157    	
;;;158    	*((__IO uint32_t *)&I2C_PORT[port]->CON) = (*((__IO uint32_t *)&I2C_PORT[port]->CON) & ~0x1E) | Reg;
00001a  0081              LSLS     r1,r0,#2
00001c  4803              LDR      r0,|L4.44|
00001e  5840              LDR      r0,[r0,r1]
000020  6801              LDR      r1,[r0,#0]
000022  221e              MOVS     r2,#0x1e
000024  4391              BICS     r1,r1,r2
000026  4321              ORRS     r1,r1,r4
000028  6001              STR      r1,[r0,#0]
;;;159    }
00002a  bd10              POP      {r4,pc}
;;;160    
                          ENDP

                  |L4.44|
                          DCD      ||.data||

                          AREA ||i.DrvI2C_DisableInt||, CODE, READONLY, ALIGN=2

                  DrvI2C_DisableInt PROC
;;;335      */
;;;336    int32_t DrvI2C_DisableInt(E_I2C_PORT port)
000000  4907              LDR      r1,|L5.32|
;;;337    {
;;;338    	
;;;339    	I2C_PORT[port]->CON_BITS.INTEN = 0;
000002  0082              LSLS     r2,r0,#2
000004  5889              LDR      r1,[r1,r2]
000006  680a              LDR      r2,[r1,#0]
000008  2380              MOVS     r3,#0x80
00000a  439a              BICS     r2,r2,r3
00000c  600a              STR      r2,[r1,#0]
;;;340    	NVIC_DisableIRQ((IRQn_Type)(I2C0_IRQn+(uint32_t)port));    
00000e  3012              ADDS     r0,r0,#0x12
000010  06c1              LSLS     r1,r0,#27
000012  0ec9              LSRS     r1,r1,#27
000014  2001              MOVS     r0,#1
000016  4088              LSLS     r0,r0,r1
000018  4902              LDR      r1,|L5.36|
00001a  6008              STR      r0,[r1,#0]
;;;341    
;;;342    	return 0;
00001c  2000              MOVS     r0,#0
;;;343    }
00001e  4770              BX       lr
;;;344    
                          ENDP

                  |L5.32|
                          DCD      ||.data||
                  |L5.36|
                          DCD      0xe000e180

                          AREA ||i.DrvI2C_EnableInt||, CODE, READONLY, ALIGN=2

                  DrvI2C_EnableInt PROC
;;;321      */
;;;322    int32_t DrvI2C_EnableInt(E_I2C_PORT port)
000000  4907              LDR      r1,|L6.32|
;;;323    {
;;;324    	
;;;325    	I2C_PORT[port]->CON_BITS.INTEN = 1;
000002  0082              LSLS     r2,r0,#2
000004  5889              LDR      r1,[r1,r2]
000006  680a              LDR      r2,[r1,#0]
000008  2380              MOVS     r3,#0x80
00000a  431a              ORRS     r2,r2,r3
00000c  600a              STR      r2,[r1,#0]
;;;326    	NVIC_EnableIRQ((IRQn_Type)(I2C0_IRQn+(uint32_t)port));
00000e  3012              ADDS     r0,r0,#0x12
000010  06c1              LSLS     r1,r0,#27
000012  0ec9              LSRS     r1,r1,#27
000014  2001              MOVS     r0,#1
000016  4088              LSLS     r0,r0,r1
000018  4902              LDR      r1,|L6.36|
00001a  6008              STR      r0,[r1,#0]
;;;327    
;;;328    	return 0;
00001c  2000              MOVS     r0,#0
;;;329    }
00001e  4770              BX       lr
;;;330    
                          ENDP

                  |L6.32|
                          DCD      ||.data||
                  |L6.36|
                          DCD      0xe000e100

                          AREA ||i.DrvI2C_GetClockFreq||, CODE, READONLY, ALIGN=2

                  DrvI2C_GetClockFreq PROC
;;;308      */
;;;309    uint32_t DrvI2C_GetClockFreq(E_I2C_PORT port)
000000  b510              PUSH     {r4,lr}
;;;310    {
;;;311        uint32_t divider;     
;;;312     
;;;313    	divider = ( (port)? I2C1->DIV:I2C0->DIV );
000002  2800              CMP      r0,#0
000004  d001              BEQ      |L7.10|
000006  4805              LDR      r0,|L7.28|
000008  e000              B        |L7.12|
                  |L7.10|
00000a  4805              LDR      r0,|L7.32|
                  |L7.12|
00000c  68c0              LDR      r0,[r0,#0xc]
;;;314    	return ( SystemCoreClock / ((divider+1)<<2) );
00000e  0081              LSLS     r1,r0,#2
000010  4804              LDR      r0,|L7.36|
000012  1d09              ADDS     r1,r1,#4
000014  6800              LDR      r0,[r0,#0]  ; SystemCoreClock
000016  f7fffffe          BL       __aeabi_uidivmod
;;;315    }
00001a  bd10              POP      {r4,pc}
;;;316    
                          ENDP

                  |L7.28|
                          DCD      0x40120000
                  |L7.32|
                          DCD      0x40020000
                  |L7.36|
                          DCD      SystemCoreClock

                          AREA ||i.DrvI2C_GetIntFlag||, CODE, READONLY, ALIGN=2

                  DrvI2C_GetIntFlag PROC
;;;206      */
;;;207    uint8_t DrvI2C_GetIntFlag(E_I2C_PORT port)
000000  4903              LDR      r1,|L8.16|
;;;208    {
;;;209    	return I2C_PORT[port]->INTSTS_BITS.STAINTSTS;
000002  0080              LSLS     r0,r0,#2
000004  5808              LDR      r0,[r1,r0]
000006  6840              LDR      r0,[r0,#4]
000008  07c0              LSLS     r0,r0,#31
00000a  0fc0              LSRS     r0,r0,#31
;;;210    }
00000c  4770              BX       lr
;;;211    
                          ENDP

00000e  0000              DCW      0x0000
                  |L8.16|
                          DCD      ||.data||

                          AREA ||i.DrvI2C_GetStatus||, CODE, READONLY, ALIGN=2

                  DrvI2C_GetStatus PROC
;;;226      */
;;;227    uint32_t DrvI2C_GetStatus(E_I2C_PORT port)
000000  4902              LDR      r1,|L9.12|
;;;228    {
;;;229    	return I2C_PORT[port]->INTSTS;
000002  0080              LSLS     r0,r0,#2
000004  5808              LDR      r0,[r1,r0]
000006  6840              LDR      r0,[r0,#4]
;;;230    }
000008  4770              BX       lr
;;;231    /**
                          ENDP

00000a  0000              DCW      0x0000
                  |L9.12|
                          DCD      ||.data||

                          AREA ||i.DrvI2C_InstallCallback||, CODE, READONLY, ALIGN=2

                  DrvI2C_InstallCallback PROC
;;;421      */
;;;422    int32_t DrvI2C_InstallCallback(E_I2C_PORT port, E_I2C_CALLBACK_TYPE Type, I2C_CALLBACK callbackfn)
000000  b530              PUSH     {r4,r5,lr}
;;;423    {	
;;;424    	switch(Type)
;;;425    	{
;;;426        	case I2CFUNC:
;;;427        	{
;;;428            	I2CHandler[port].I2CCallBackFn = callbackfn;  
000002  2314              MOVS     r3,#0x14
000004  4358              MULS     r0,r3,r0
000006  4d0b              LDR      r5,|L10.52|
000008  000b              MOVS     r3,r1                 ;424
;;;429        		break;
;;;430        	}
;;;431        	case ARBITLOSS:
;;;432        	{
;;;433            	I2CHandler[port].ArbitLossCallBackFn = callbackfn;  
00000a  1944              ADDS     r4,r0,r5
00000c  f7fffffe          BL       __ARM_common_switch8
000010  05040608          DCB      0x05,0x04,0x06,0x08
000014  0a0c0f00          DCB      0x0a,0x0c,0x0f,0x00
000018  502a              STR      r2,[r5,r0]            ;428
00001a  e006              B        |L10.42|
;;;434        		break;
00001c  6062              STR      r2,[r4,#4]
00001e  e004              B        |L10.42|
;;;435        	}
;;;436        	case BUSERROR:
;;;437        	{
;;;438            	I2CHandler[port].BusErrCallBackFn = callbackfn;  
;;;439        		break;
000020  60a2              STR      r2,[r4,#8]
000022  e002              B        |L10.42|
;;;440        	}        
;;;441        	case TIMEOUT:
;;;442        	{
;;;443            	I2CHandler[port].TimeoutCallBackFn = callbackfn;  
;;;444        		break;
000024  60e2              STR      r2,[r4,#0xc]
000026  e000              B        |L10.42|
;;;445        	}    	
;;;446        	case WAKEUP:
;;;447        	{
;;;448            	I2CHandler[port].WakeupCallBackFn = callbackfn;  
000028  6122              STR      r2,[r4,#0x10]
                  |L10.42|
;;;449        		break;
;;;450        	}
;;;451    		default:
;;;452    			return -1;                             	
;;;453    	}
;;;454    	
;;;455    	return 0;
00002a  2000              MOVS     r0,#0
;;;456    }
00002c  bd30              POP      {r4,r5,pc}
00002e  2000              MOVS     r0,#0                 ;452
000030  43c0              MVNS     r0,r0                 ;452
000032  bd30              POP      {r4,r5,pc}
;;;457    
                          ENDP

                  |L10.52|
                          DCD      ||.bss||

                          AREA ||i.DrvI2C_Open||, CODE, READONLY, ALIGN=2

                  DrvI2C_Open PROC
;;;236      */
;;;237    int32_t DrvI2C_Open(E_I2C_PORT port, uint32_t u32BusClock)
000000  b570              PUSH     {r4-r6,lr}
;;;238    {
000002  4604              MOV      r4,r0
;;;239        uint32_t divider;     
;;;240     
;;;241    	divider = (uint32_t) (((SystemCoreClock*10)/(u32BusClock * 4) + 5) / 10 - 1);	/* Compute proper divider for I2C clock */
000004  4817              LDR      r0,|L11.100|
000006  220a              MOVS     r2,#0xa
000008  6800              LDR      r0,[r0,#0]  ; SystemCoreClock
00000a  0089              LSLS     r1,r1,#2
00000c  4350              MULS     r0,r2,r0
00000e  f7fffffe          BL       __aeabi_uidivmod
000012  1d40              ADDS     r0,r0,#5
000014  210a              MOVS     r1,#0xa
000016  f7fffffe          BL       __aeabi_uidivmod
;;;242    	
;;;243        if (port)
;;;244    	{
;;;245    		CLK->APBCLK_BITS.I2C1_EN = 1;
00001a  4b13              LDR      r3,|L11.104|
;;;246    		GCR->IPRST_CTL2_BITS.I2C1_RST = 1;
00001c  2105              MOVS     r1,#5
00001e  1e40              SUBS     r0,r0,#1              ;241
000020  0709              LSLS     r1,r1,#28
;;;247    		GCR->IPRST_CTL2_BITS.I2C1_RST = 0;	
;;;248    	}
;;;249    	else
;;;250    	{
;;;251    		CLK->APBCLK_BITS.I2C0_EN = 1;
000022  689d              LDR      r5,[r3,#8]
000024  2c00              CMP      r4,#0                 ;243
000026  d002              BEQ      |L11.46|
000028  2201              MOVS     r2,#1                 ;245
00002a  0252              LSLS     r2,r2,#9              ;245
00002c  e001              B        |L11.50|
                  |L11.46|
00002e  22ff              MOVS     r2,#0xff
000030  3201              ADDS     r2,#1
                  |L11.50|
000032  4315              ORRS     r5,r5,r2
000034  609d              STR      r5,[r3,#8]
;;;252    		GCR->IPRST_CTL2_BITS.I2C0_RST = 1;
000036  68cb              LDR      r3,[r1,#0xc]
000038  4313              ORRS     r3,r3,r2
00003a  60cb              STR      r3,[r1,#0xc]
;;;253    		GCR->IPRST_CTL2_BITS.I2C0_RST = 0;			
00003c  68cb              LDR      r3,[r1,#0xc]
00003e  4393              BICS     r3,r3,r2
000040  60cb              STR      r3,[r1,#0xc]
;;;254    	}
;;;255    	
;;;256    	I2C_PORT[port]->CON_BITS.INTEN = 1;
000042  4b0a              LDR      r3,|L11.108|
000044  00a1              LSLS     r1,r4,#2
000046  585a              LDR      r2,[r3,r1]
000048  6814              LDR      r4,[r2,#0]
00004a  2580              MOVS     r5,#0x80
00004c  432c              ORRS     r4,r4,r5
00004e  6014              STR      r4,[r2,#0]
;;;257    	I2C_PORT[port]->DIV = divider;
000050  585a              LDR      r2,[r3,r1]
000052  60d0              STR      r0,[r2,#0xc]
;;;258    	I2C_PORT[port]->CON_BITS.IPEN = 1;
000054  5858              LDR      r0,[r3,r1]
000056  6801              LDR      r1,[r0,#0]
000058  2201              MOVS     r2,#1
00005a  4311              ORRS     r1,r1,r2
00005c  6001              STR      r1,[r0,#0]
;;;259    
;;;260    	return 0;
00005e  2000              MOVS     r0,#0
;;;261    }
000060  bd70              POP      {r4-r6,pc}
;;;262    
                          ENDP

000062  0000              DCW      0x0000
                  |L11.100|
                          DCD      SystemCoreClock
                  |L11.104|
                          DCD      0x50000200
                  |L11.108|
                          DCD      ||.data||

                          AREA ||i.DrvI2C_ReadData||, CODE, READONLY, ALIGN=2

                  DrvI2C_ReadData PROC
;;;196      */
;;;197    uint8_t DrvI2C_ReadData(E_I2C_PORT port)
000000  4902              LDR      r1,|L12.12|
;;;198    {
;;;199    	return I2C_PORT[port]->DATA;
000002  0080              LSLS     r0,r0,#2
000004  5808              LDR      r0,[r1,r0]
000006  6940              LDR      r0,[r0,#0x14]
000008  b2c0              UXTB     r0,r0
;;;200    }
00000a  4770              BX       lr
;;;201    
                          ENDP

                  |L12.12|
                          DCD      ||.data||

                          AREA ||i.DrvI2C_SetAddress||, CODE, READONLY, ALIGN=2

                  DrvI2C_SetAddress PROC
;;;369      */
;;;370    int32_t DrvI2C_SetAddress(E_I2C_PORT port, uint8_t slaveNo, uint8_t slave_addr, uint8_t GC_Flag)
000000  b570              PUSH     {r4-r6,lr}
;;;371    {	
;;;372    	switch (slaveNo)
;;;373    	{
;;;374    		case 0:
;;;375    			I2C_PORT[port]->SADDR0_BITS.SADDR = slave_addr;
000002  0652              LSLS     r2,r2,#25
;;;376    			I2C_PORT[port]->SADDR0_BITS.GCALL = GC_Flag;
000004  07db              LSLS     r3,r3,#31
000006  4c12              LDR      r4,|L13.80|
000008  25fe              MOVS     r5,#0xfe              ;375
00000a  0e12              LSRS     r2,r2,#24             ;375
00000c  0fdb              LSRS     r3,r3,#31
00000e  0080              LSLS     r0,r0,#2              ;375
000010  2900              CMP      r1,#0                 ;372
000012  d004              BEQ      |L13.30|
000014  2901              CMP      r1,#1                 ;372
000016  d00e              BEQ      |L13.54|
;;;377    			break;
;;;378    		case 1:
;;;379    			I2C_PORT[port]->SADDR1_BITS.SADDR = slave_addr;
;;;380    			I2C_PORT[port]->SADDR1_BITS.GCALL = GC_Flag;
;;;381    			break;			
;;;382    		default:
;;;383    			return -1;
000018  2000              MOVS     r0,#0
00001a  43c0              MVNS     r0,r0
;;;384    	}
;;;385    
;;;386    	return 0;
;;;387    }
00001c  bd70              POP      {r4-r6,pc}
                  |L13.30|
00001e  5821              LDR      r1,[r4,r0]            ;375
000020  698e              LDR      r6,[r1,#0x18]         ;375
000022  43ae              BICS     r6,r6,r5              ;375
000024  4316              ORRS     r6,r6,r2              ;375
000026  618e              STR      r6,[r1,#0x18]         ;375
000028  5820              LDR      r0,[r4,r0]            ;376
00002a  6981              LDR      r1,[r0,#0x18]         ;376
00002c  0849              LSRS     r1,r1,#1              ;376
00002e  0049              LSLS     r1,r1,#1              ;376
000030  4319              ORRS     r1,r1,r3              ;376
000032  6181              STR      r1,[r0,#0x18]         ;376
000034  e00a              B        |L13.76|
                  |L13.54|
000036  5821              LDR      r1,[r4,r0]            ;379
000038  69ce              LDR      r6,[r1,#0x1c]         ;379
00003a  43ae              BICS     r6,r6,r5              ;379
00003c  4316              ORRS     r6,r6,r2              ;379
00003e  61ce              STR      r6,[r1,#0x1c]         ;379
000040  5820              LDR      r0,[r4,r0]            ;380
000042  69c1              LDR      r1,[r0,#0x1c]         ;380
000044  0849              LSRS     r1,r1,#1              ;380
000046  0049              LSLS     r1,r1,#1              ;380
000048  4319              ORRS     r1,r1,r3              ;380
00004a  61c1              STR      r1,[r0,#0x1c]         ;380
                  |L13.76|
00004c  2000              MOVS     r0,#0                 ;386
00004e  bd70              POP      {r4-r6,pc}
;;;388    
                          ENDP

                  |L13.80|
                          DCD      ||.data||

                          AREA ||i.DrvI2C_SetAddressMask||, CODE, READONLY, ALIGN=2

                  DrvI2C_SetAddressMask PROC
;;;396      */
;;;397    int32_t DrvI2C_SetAddressMask(E_I2C_PORT port, uint8_t slaveNo, uint8_t slaveAddrMask)
000000  b510              PUSH     {r4,lr}
;;;398    {
;;;399    	switch (slaveNo)
;;;400    	{
;;;401    		case 0:
;;;402    			I2C_PORT[port]->SAMASK0_BITS.SAMASK = slaveAddrMask;
000002  0652              LSLS     r2,r2,#25
000004  4c0b              LDR      r4,|L14.52|
000006  23fe              MOVS     r3,#0xfe
000008  0e12              LSRS     r2,r2,#24
00000a  0080              LSLS     r0,r0,#2
00000c  2900              CMP      r1,#0                 ;399
00000e  d004              BEQ      |L14.26|
000010  2901              CMP      r1,#1                 ;399
000012  d008              BEQ      |L14.38|
;;;403    			break;
;;;404    		case 1:
;;;405    			I2C_PORT[port]->SAMASK1_BITS.SAMASK = slaveAddrMask;
;;;406    			break;			
;;;407    		default:
;;;408    			return -1;
000014  2000              MOVS     r0,#0
000016  43c0              MVNS     r0,r0
;;;409    	}
;;;410    	
;;;411    	return 0;
;;;412    }
000018  bd10              POP      {r4,pc}
                  |L14.26|
00001a  5820              LDR      r0,[r4,r0]            ;402
00001c  6a81              LDR      r1,[r0,#0x28]         ;402
00001e  4399              BICS     r1,r1,r3              ;402
000020  4311              ORRS     r1,r1,r2              ;402
000022  6281              STR      r1,[r0,#0x28]         ;402
000024  e004              B        |L14.48|
                  |L14.38|
000026  5820              LDR      r0,[r4,r0]            ;405
000028  6ac1              LDR      r1,[r0,#0x2c]         ;405
00002a  4399              BICS     r1,r1,r3              ;405
00002c  4311              ORRS     r1,r1,r2              ;405
00002e  62c1              STR      r1,[r0,#0x2c]         ;405
                  |L14.48|
000030  2000              MOVS     r0,#0                 ;411
000032  bd10              POP      {r4,pc}
;;;413    
                          ENDP

                  |L14.52|
                          DCD      ||.data||

                          AREA ||i.DrvI2C_SetClockFreq||, CODE, READONLY, ALIGN=2

                  DrvI2C_SetClockFreq PROC
;;;293      */
;;;294    int32_t DrvI2C_SetClockFreq(E_I2C_PORT port, uint32_t u32BusClock)
000000  b510              PUSH     {r4,lr}
;;;295    {
000002  4604              MOV      r4,r0
;;;296        uint32_t divider;     
;;;297     
;;;298    	divider = (uint32_t) (((SystemCoreClock*10)/(u32BusClock * 4) + 5) / 10 - 1);
000004  4808              LDR      r0,|L15.40|
000006  220a              MOVS     r2,#0xa
000008  6800              LDR      r0,[r0,#0]  ; SystemCoreClock
00000a  0089              LSLS     r1,r1,#2
00000c  4350              MULS     r0,r2,r0
00000e  f7fffffe          BL       __aeabi_uidivmod
000012  1d40              ADDS     r0,r0,#5
000014  210a              MOVS     r1,#0xa
000016  f7fffffe          BL       __aeabi_uidivmod
00001a  1e40              SUBS     r0,r0,#1
;;;299        I2C_PORT[port]->DIV = divider;
00001c  4a03              LDR      r2,|L15.44|
00001e  00a1              LSLS     r1,r4,#2
000020  5851              LDR      r1,[r2,r1]
000022  60c8              STR      r0,[r1,#0xc]
;;;300    
;;;301    	return 0;
000024  2000              MOVS     r0,#0
;;;302    }
000026  bd10              POP      {r4,pc}
;;;303    
                          ENDP

                  |L15.40|
                          DCD      SystemCoreClock
                  |L15.44|
                          DCD      ||.data||

                          AREA ||i.DrvI2C_SetTimeoutCounter||, CODE, READONLY, ALIGN=2

                  DrvI2C_SetTimeoutCounter PROC
;;;351      */
;;;352    int32_t DrvI2C_SetTimeoutCounter(E_I2C_PORT port, int32_t i32enable, uint8_t u8div4)
000000  b570              PUSH     {r4-r6,lr}
;;;353    {
;;;354    
;;;355    	I2C_PORT[port]->TOUT_BITS.DIV4 = u8div4;
000002  4d0a              LDR      r5,|L16.44|
000004  0080              LSLS     r0,r0,#2
000006  582b              LDR      r3,[r5,r0]
000008  691c              LDR      r4,[r3,#0x10]
00000a  2602              MOVS     r6,#2
00000c  07d2              LSLS     r2,r2,#31
00000e  43b4              BICS     r4,r4,r6
000010  0f92              LSRS     r2,r2,#30
000012  4314              ORRS     r4,r4,r2
000014  611c              STR      r4,[r3,#0x10]
;;;356    	I2C_PORT[port]->TOUT_BITS.TOUTEN = i32enable;
000016  5828              LDR      r0,[r5,r0]
000018  6902              LDR      r2,[r0,#0x10]
00001a  07c9              LSLS     r1,r1,#31
00001c  0852              LSRS     r2,r2,#1
00001e  0052              LSLS     r2,r2,#1
000020  0fc9              LSRS     r1,r1,#31
000022  430a              ORRS     r2,r2,r1
000024  6102              STR      r2,[r0,#0x10]
;;;357    
;;;358    	return 0;
000026  2000              MOVS     r0,#0
;;;359    }
000028  bd70              POP      {r4-r6,pc}
;;;360    
                          ENDP

00002a  0000              DCW      0x0000
                  |L16.44|
                          DCD      ||.data||

                          AREA ||i.DrvI2C_Trig||, CODE, READONLY, ALIGN=2

                  DrvI2C_Trig PROC
;;;165      */
;;;166    void DrvI2C_Trig(E_I2C_PORT port)
000000  0081              LSLS     r1,r0,#2
;;;167    {
;;;168    	I2C_PORT[port]->CON_BITS.TRIG = 1;
000002  4803              LDR      r0,|L17.16|
000004  5840              LDR      r0,[r0,r1]
000006  6801              LDR      r1,[r0,#0]
000008  2210              MOVS     r2,#0x10
00000a  4311              ORRS     r1,r1,r2
00000c  6001              STR      r1,[r0,#0]
;;;169    }
00000e  4770              BX       lr
;;;170    
                          ENDP

                  |L17.16|
                          DCD      ||.data||

                          AREA ||i.DrvI2C_UninstallCallBack||, CODE, READONLY, ALIGN=2

                  DrvI2C_UninstallCallBack PROC
;;;464      */
;;;465    int32_t DrvI2C_UninstallCallBack(E_I2C_PORT port, E_I2C_CALLBACK_TYPE Type)
000000  b530              PUSH     {r4,r5,lr}
;;;466    {
;;;467    	switch(Type)
;;;468    	{
;;;469        	case I2CFUNC:
;;;470        	{
;;;471            	I2CHandler[port].I2CCallBackFn = NULL;  
000002  2214              MOVS     r2,#0x14
000004  4d0c              LDR      r5,|L18.56|
000006  4350              MULS     r0,r2,r0
000008  2400              MOVS     r4,#0                 ;466
;;;472        		break;
;;;473        	}
;;;474        	case ARBITLOSS:
;;;475        	{
;;;476            	I2CHandler[port].ArbitLossCallBackFn = NULL;  
00000a  1942              ADDS     r2,r0,r5
00000c  000b              MOVS     r3,r1                 ;467
00000e  f7fffffe          BL       __ARM_common_switch8
000012  0504              DCB      0x05,0x04
000014  06080a0c          DCB      0x06,0x08,0x0a,0x0c
000018  0f00              DCB      0x0f,0x00
00001a  502c              STR      r4,[r5,r0]            ;471
00001c  e006              B        |L18.44|
;;;477        		break;
00001e  6054              STR      r4,[r2,#4]
000020  e004              B        |L18.44|
;;;478        	}
;;;479        	case BUSERROR:
;;;480        	{
;;;481            	I2CHandler[port].BusErrCallBackFn = NULL;  
;;;482        		break;
000022  6094              STR      r4,[r2,#8]
000024  e002              B        |L18.44|
;;;483        	}        
;;;484        	case TIMEOUT:
;;;485        	{
;;;486            	I2CHandler[port].TimeoutCallBackFn = NULL;  
;;;487        		break;
000026  60d4              STR      r4,[r2,#0xc]
000028  e000              B        |L18.44|
;;;488        	}    	
;;;489        	case WAKEUP:
;;;490        	{
;;;491            	I2CHandler[port].WakeupCallBackFn = NULL;  
00002a  6114              STR      r4,[r2,#0x10]
                  |L18.44|
;;;492        		break;
;;;493        	}
;;;494    		default:
;;;495    			return -1;                             	
;;;496    	}
;;;497    	
;;;498    	return 0;
00002c  2000              MOVS     r0,#0
;;;499    }
00002e  bd30              POP      {r4,r5,pc}
000030  2000              MOVS     r0,#0                 ;495
000032  43c0              MVNS     r0,r0                 ;495
000034  bd30              POP      {r4,r5,pc}
;;;500    
                          ENDP

000036  0000              DCW      0x0000
                  |L18.56|
                          DCD      ||.bss||

                          AREA ||i.DrvI2C_WakeupConfigure||, CODE, READONLY, ALIGN=2

                  DrvI2C_WakeupConfigure PROC
;;;506      */
;;;507    void DrvI2C_WakeupConfigure(E_I2C_PORT port, uint8_t bEnable)
000000  0082              LSLS     r2,r0,#2
;;;508    {
;;;509    	I2C_PORT[port]->WKUPCON_BITS.WKUPEN = bEnable;
000002  4805              LDR      r0,|L19.24|
000004  5880              LDR      r0,[r0,r2]
000006  6c02              LDR      r2,[r0,#0x40]
000008  07c9              LSLS     r1,r1,#31
00000a  0852              LSRS     r2,r2,#1
00000c  0052              LSLS     r2,r2,#1
00000e  0fc9              LSRS     r1,r1,#31
000010  430a              ORRS     r2,r2,r1
000012  6402              STR      r2,[r0,#0x40]
;;;510    }
000014  4770              BX       lr
;;;511    
                          ENDP

000016  0000              DCW      0x0000
                  |L19.24|
                          DCD      ||.data||

                          AREA ||i.DrvI2C_WriteData||, CODE, READONLY, ALIGN=2

                  DrvI2C_WriteData PROC
;;;186      */
;;;187    void DrvI2C_WriteData(E_I2C_PORT port, uint8_t u8data)
000000  4a02              LDR      r2,|L20.12|
;;;188    {
;;;189    	I2C_PORT[port]->DATA = u8data;
000002  0080              LSLS     r0,r0,#2
000004  5810              LDR      r0,[r2,r0]
000006  6141              STR      r1,[r0,#0x14]
;;;190    }
000008  4770              BX       lr
;;;191    
                          ENDP

00000a  0000              DCW      0x0000
                  |L20.12|
                          DCD      ||.data||

                          AREA ||i.I2C0_IRQHandler||, CODE, READONLY, ALIGN=2

                  I2C0_IRQHandler PROC
;;;30       */
;;;31     void I2C0_IRQHandler(void)
000000  b430              PUSH     {r4,r5}
;;;32     {
;;;33         uint32_t status;
;;;34     	
;;;35     	// clear interrupt flag
;;;36     	I2C0->INTSTS_BITS.STAINTSTS = 1;
000002  4a14              LDR      r2,|L21.84|
000004  6850              LDR      r0,[r2,#4]
000006  2401              MOVS     r4,#1
000008  4320              ORRS     r0,r0,r4
00000a  6050              STR      r0,[r2,#4]
;;;37     	
;;;38       	status  = I2C0->STATUS;
00000c  6890              LDR      r0,[r2,#8]
;;;39     
;;;40         if (I2C0->INTSTS_BITS.TOUTSTS)
00000e  6851              LDR      r1,[r2,#4]
000010  078b              LSLS     r3,r1,#30
;;;41     	{
;;;42     		I2C0->INTSTS_BITS.TOUTSTS = 1;	/* Clear TIF */
;;;43            	
;;;44     		if (I2CHandler[0].TimeoutCallBackFn)
000012  4911              LDR      r1,|L21.88|
000014  d505              BPL      |L21.34|
000016  6853              LDR      r3,[r2,#4]            ;42
000018  2402              MOVS     r4,#2                 ;42
00001a  4323              ORRS     r3,r3,r4              ;42
00001c  6053              STR      r3,[r2,#4]            ;42
00001e  68c9              LDR      r1,[r1,#0xc]  ; I2CHandler
000020  e008              B        |L21.52|
                  |L21.34|
;;;45     		{
;;;46     			I2CHandler[0].TimeoutCallBackFn(status); 
;;;47     		}
;;;48     	}
;;;49     	else if(I2C0->WKUPSTS_BITS.WKUPIF == 1)
000022  4a0c              LDR      r2,|L21.84|
000024  3240              ADDS     r2,r2,#0x40
000026  6853              LDR      r3,[r2,#4]
000028  07db              LSLS     r3,r3,#31
00002a  d007              BEQ      |L21.60|
;;;50     	{
;;;51     		I2C0->WKUPSTS_BITS.WKUPIF = 1;
00002c  6853              LDR      r3,[r2,#4]
00002e  4323              ORRS     r3,r3,r4
000030  6053              STR      r3,[r2,#4]
;;;52     		if (I2CHandler[0].WakeupCallBackFn)
000032  6909              LDR      r1,[r1,#0x10]  ; I2CHandler
                  |L21.52|
000034  2900              CMP      r1,#0                 ;44
000036  d00b              BEQ      |L21.80|
;;;53     		{
;;;54     			I2CHandler[0].WakeupCallBackFn(status); 
;;;55     		}
;;;56     	}
;;;57     	else
;;;58     	{
;;;59     		switch (status)
;;;60         	{	
;;;61          		case 0x38:	/* Arbitration loss */
;;;62          		{
;;;63             		if (I2CHandler[0].ArbitLossCallBackFn)
;;;64     					I2CHandler[0].ArbitLossCallBackFn(status); 
;;;65          	    	break;
;;;66          		}
;;;67      			case 0x00: 	/* Bus error */
;;;68     			{
;;;69             		if (I2CHandler[0].BusErrCallBackFn)
;;;70     					I2CHandler[0].BusErrCallBackFn(status); 
;;;71          	    	break;
;;;72     			}
;;;73     			default:
;;;74     			{
;;;75             		if (I2CHandler[0].I2CCallBackFn)
;;;76     					I2CHandler[0].I2CCallBackFn(status); 			
000038  bc30              POP      {r4,r5}
00003a  4708              BX       r1
                  |L21.60|
00003c  2800              CMP      r0,#0                 ;59
00003e  d005              BEQ      |L21.76|
000040  2838              CMP      r0,#0x38              ;59
000042  d001              BEQ      |L21.72|
000044  6809              LDR      r1,[r1,#0]            ;75  ; I2CHandler
000046  e7f5              B        |L21.52|
                  |L21.72|
000048  6849              LDR      r1,[r1,#4]            ;63  ; I2CHandler
00004a  e7f3              B        |L21.52|
                  |L21.76|
00004c  6889              LDR      r1,[r1,#8]            ;69  ; I2CHandler
00004e  e7f1              B        |L21.52|
                  |L21.80|
;;;77     			}		
;;;78     		}
;;;79     		
;;;80     	}
;;;81     }
000050  bc30              POP      {r4,r5}
000052  4770              BX       lr
;;;82     
                          ENDP

                  |L21.84|
                          DCD      0x40020000
                  |L21.88|
                          DCD      ||.bss||

                          AREA ||i.I2C1_IRQHandler||, CODE, READONLY, ALIGN=2

                  I2C1_IRQHandler PROC
;;;87       */
;;;88     void I2C1_IRQHandler(void)
000000  b430              PUSH     {r4,r5}
;;;89     {
;;;90         uint32_t status;
;;;91     			
;;;92     	// clear interrupt flag
;;;93     	I2C1->INTSTS_BITS.STAINTSTS = 1;
000002  4a14              LDR      r2,|L22.84|
000004  6850              LDR      r0,[r2,#4]
000006  2401              MOVS     r4,#1
000008  4320              ORRS     r0,r0,r4
00000a  6050              STR      r0,[r2,#4]
;;;94     	
;;;95       	status  = I2C1->STATUS;
00000c  6890              LDR      r0,[r2,#8]
;;;96     
;;;97         if (I2C1->INTSTS_BITS.TOUTSTS)
00000e  6851              LDR      r1,[r2,#4]
000010  078b              LSLS     r3,r1,#30
;;;98     	{
;;;99     		I2C1->INTSTS_BITS.TOUTSTS = 1;	/* Clear TIF */
;;;100           	
;;;101    		if (I2CHandler[1].TimeoutCallBackFn)
000012  4911              LDR      r1,|L22.88|
000014  d505              BPL      |L22.34|
000016  6853              LDR      r3,[r2,#4]            ;99
000018  2402              MOVS     r4,#2                 ;99
00001a  4323              ORRS     r3,r3,r4              ;99
00001c  6053              STR      r3,[r2,#4]            ;99
00001e  6a09              LDR      r1,[r1,#0x20]  ; I2CHandler
000020  e008              B        |L22.52|
                  |L22.34|
;;;102    		{
;;;103    			I2CHandler[1].TimeoutCallBackFn(status); 
;;;104    		}
;;;105    	}
;;;106    	else if(I2C1->WKUPSTS_BITS.WKUPIF == 1)
000022  4a0c              LDR      r2,|L22.84|
000024  3240              ADDS     r2,r2,#0x40
000026  6853              LDR      r3,[r2,#4]
000028  07db              LSLS     r3,r3,#31
00002a  d007              BEQ      |L22.60|
;;;107    	{
;;;108    		I2C1->WKUPSTS_BITS.WKUPIF = 1;
00002c  6853              LDR      r3,[r2,#4]
00002e  4323              ORRS     r3,r3,r4
000030  6053              STR      r3,[r2,#4]
;;;109    		if (I2CHandler[1].WakeupCallBackFn)
000032  6a49              LDR      r1,[r1,#0x24]  ; I2CHandler
                  |L22.52|
000034  2900              CMP      r1,#0                 ;101
000036  d00b              BEQ      |L22.80|
;;;110    		{
;;;111    			I2CHandler[1].WakeupCallBackFn(status); 
;;;112    		}
;;;113    	}
;;;114    	else
;;;115    	{
;;;116    		switch (status)
;;;117        	{	
;;;118         		case 0x38:	/* Arbitration loss */
;;;119         		{
;;;120            		if (I2CHandler[1].ArbitLossCallBackFn)
;;;121    					I2CHandler[1].ArbitLossCallBackFn(status); 
;;;122         	    	break;
;;;123         		}
;;;124     			case 0x00:	/* Bus error */
;;;125    			{
;;;126            		if (I2CHandler[1].BusErrCallBackFn)
;;;127    					I2CHandler[1].BusErrCallBackFn(status); 
;;;128         	    	break;
;;;129    			}
;;;130    			default:
;;;131    			{
;;;132            		if (I2CHandler[1].I2CCallBackFn)
;;;133    					I2CHandler[1].I2CCallBackFn(status); 			
000038  bc30              POP      {r4,r5}
00003a  4708              BX       r1
                  |L22.60|
00003c  2800              CMP      r0,#0                 ;116
00003e  d005              BEQ      |L22.76|
000040  2838              CMP      r0,#0x38              ;116
000042  d001              BEQ      |L22.72|
000044  6949              LDR      r1,[r1,#0x14]         ;132  ; I2CHandler
000046  e7f5              B        |L22.52|
                  |L22.72|
000048  6989              LDR      r1,[r1,#0x18]         ;120  ; I2CHandler
00004a  e7f3              B        |L22.52|
                  |L22.76|
00004c  69c9              LDR      r1,[r1,#0x1c]         ;126  ; I2CHandler
00004e  e7f1              B        |L22.52|
                  |L22.80|
;;;134    			}		
;;;135    		}		
;;;136    	}  
;;;137    }
000050  bc30              POP      {r4,r5}
000052  4770              BX       lr
;;;138    
                          ENDP

                  |L22.84|
                          DCD      0x40120000
                  |L22.88|
                          DCD      ||.bss||

                          AREA ||.bss||, DATA, NOINIT, ALIGN=2

                  I2CHandler
                          %        40

                          AREA ||.data||, DATA, ALIGN=2

                  I2C_PORT
                          DCD      0x40020000
                          DCD      0x40120000

                          AREA ||i.__ARM_common_switch8||, COMGROUP=__ARM_common_switch8, CODE, READONLY, ALIGN=1

                  __ARM_common_switch8 PROC
000000  b430              PUSH     {r4,r5}
000002  4674              MOV      r4,lr
000004  1e64              SUBS     r4,r4,#1
000006  7825              LDRB     r5,[r4,#0]
000008  1c64              ADDS     r4,r4,#1
00000a  42ab              CMP      r3,r5
00000c  d200              BCS      |L142.16|
00000e  461d              MOV      r5,r3
                  |L142.16|
000010  5d63              LDRB     r3,[r4,r5]
000012  005b              LSLS     r3,r3,#1
000014  18e3              ADDS     r3,r4,r3
000016  bc30              POP      {r4,r5}
000018  4718              BX       r3
                          ENDP

