; generated by ARM C/C++ Compiler, 4.1 [Build 894]
; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave -o.\obj\nano1xx_gpio.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\nano1xx_gpio.d --cpu=Cortex-M0 --apcs=interwork -I..\inc -I..\drv -I..\bsp -I..\bsp\Cmsis -I..\bsp\Driver -I..\bsp\system -I..\lib -I..\lib\libtk -IC:\Keil\ARM\RV31\Inc -IC:\Keil\ARM\CMSIS\Include -D__MICROLIB -D__LCDDISPLAY_BTL001_H --omf_browse=.\obj\nano1xx_gpio.crf ..\bsp\Driver\nano1xx_gpio.c]
                          THUMB

                          AREA ||i.GPIO_DisableEINT0||, CODE, READONLY, ALIGN=1

                  GPIO_DisableEINT0 PROC
;;;104      */
;;;105    void GPIO_DisableEINT0(GPIO_TypeDef *port, uint32_t bit)
000000  2201              MOVS     r2,#1
;;;106    {
;;;107    	port->IER &= (~((1 << bit) | (1 << (bit + 16))));
000002  4613              MOV      r3,r2
000004  408b              LSLS     r3,r3,r1
000006  b510              PUSH     {r4,lr}               ;106
000008  3110              ADDS     r1,r1,#0x10
00000a  408a              LSLS     r2,r2,r1
00000c  69c1              LDR      r1,[r0,#0x1c]
00000e  4313              ORRS     r3,r3,r2
000010  4399              BICS     r1,r1,r3
000012  61c1              STR      r1,[r0,#0x1c]
;;;108    	NVIC_DisableIRQ(EINT0_IRQn);
000014  2002              MOVS     r0,#2
000016  f7fffffe          BL       NVIC_DisableIRQ
;;;109    }
00001a  bd10              POP      {r4,pc}
;;;110    
                          ENDP


                          AREA ||i.GPIO_DisableEINT1||, CODE, READONLY, ALIGN=1

                  GPIO_DisableEINT1 PROC
;;;131      */
;;;132    void GPIO_DisableEINT1(GPIO_TypeDef *port, uint32_t bit)
000000  2201              MOVS     r2,#1
;;;133    {
;;;134    	port->IER &= (~((1 << bit) | (1 << (bit + 16))));
000002  4613              MOV      r3,r2
000004  408b              LSLS     r3,r3,r1
000006  b510              PUSH     {r4,lr}               ;133
000008  3110              ADDS     r1,r1,#0x10
00000a  408a              LSLS     r2,r2,r1
00000c  69c1              LDR      r1,[r0,#0x1c]
00000e  4313              ORRS     r3,r3,r2
000010  4399              BICS     r1,r1,r3
000012  61c1              STR      r1,[r0,#0x1c]
;;;135    	NVIC_DisableIRQ(EINT1_IRQn);
000014  2003              MOVS     r0,#3
000016  f7fffffe          BL       NVIC_DisableIRQ
;;;136    }
00001a  bd10              POP      {r4,pc}
;;;137    
                          ENDP


                          AREA ||i.GPIO_DisableInt||, CODE, READONLY, ALIGN=2

                  GPIO_DisableInt PROC
;;;67       */
;;;68     void GPIO_DisableInt(GPIO_TypeDef *port, uint32_t bit)
000000  b510              PUSH     {r4,lr}
;;;69     {
000002  4604              MOV      r4,r0
;;;70     	port->IER &= ~((1 << bit) | (1 << (bit+16)));
000004  2001              MOVS     r0,#1
000006  4602              MOV      r2,r0
000008  408a              LSLS     r2,r2,r1
00000a  3110              ADDS     r1,r1,#0x10
00000c  4088              LSLS     r0,r0,r1
00000e  4302              ORRS     r2,r2,r0
000010  69e0              LDR      r0,[r4,#0x1c]
000012  4390              BICS     r0,r0,r2
000014  61e0              STR      r0,[r4,#0x1c]
;;;71     
;;;72     	/* Disable the relative interrupt of M0 */
;;;73     	if ((port == GPIOA) || (port == GPIOB) || (port == GPIOC))
000016  480e              LDR      r0,|L3.80|
000018  4284              CMP      r4,r0
00001a  d007              BEQ      |L3.44|
00001c  480c              LDR      r0,|L3.80|
00001e  3040              ADDS     r0,r0,#0x40
000020  4284              CMP      r4,r0
000022  d003              BEQ      |L3.44|
000024  480a              LDR      r0,|L3.80|
000026  3080              ADDS     r0,r0,#0x80
000028  4284              CMP      r4,r0
00002a  d102              BNE      |L3.50|
                  |L3.44|
;;;74     	{
;;;75     		NVIC_DisableIRQ(GPABC_IRQn);
00002c  2004              MOVS     r0,#4
00002e  f7fffffe          BL       NVIC_DisableIRQ
                  |L3.50|
;;;76     	}
;;;77     
;;;78     	if ((port == GPIOD) || (port == GPIOE) || (port == GPIOF))
000032  4807              LDR      r0,|L3.80|
000034  30c0              ADDS     r0,r0,#0xc0
000036  4284              CMP      r4,r0
000038  d006              BEQ      |L3.72|
00003a  4806              LDR      r0,|L3.84|
00003c  4284              CMP      r4,r0
00003e  d003              BEQ      |L3.72|
000040  4804              LDR      r0,|L3.84|
000042  3040              ADDS     r0,r0,#0x40
000044  4284              CMP      r4,r0
000046  d102              BNE      |L3.78|
                  |L3.72|
;;;79     	{
;;;80     		NVIC_DisableIRQ(GPDEF_IRQn);
000048  2005              MOVS     r0,#5
00004a  f7fffffe          BL       NVIC_DisableIRQ
                  |L3.78|
;;;81     	}
;;;82     }
00004e  bd10              POP      {r4,pc}
;;;83     
                          ENDP

                  |L3.80|
                          DCD      0x50004000
                  |L3.84|
                          DCD      0x50004100

                          AREA ||i.GPIO_EnableEINT0||, CODE, READONLY, ALIGN=1

                  GPIO_EnableEINT0 PROC
;;;91       */
;;;92     void GPIO_EnableEINT0(GPIO_TypeDef *port, uint32_t bit, uint32_t TriggerType, uint32_t Mode)
000000  b510              PUSH     {r4,lr}
;;;93     {
;;;94     	port->IER |= TriggerType;
000002  69c4              LDR      r4,[r0,#0x1c]
000004  4314              ORRS     r4,r4,r2
000006  61c4              STR      r4,[r0,#0x1c]
;;;95     	port->IMD = (port->IMD & ~(1 << bit) | Mode);
000008  6982              LDR      r2,[r0,#0x18]
00000a  2401              MOVS     r4,#1
00000c  408c              LSLS     r4,r4,r1
00000e  43a2              BICS     r2,r2,r4
000010  431a              ORRS     r2,r2,r3
000012  6182              STR      r2,[r0,#0x18]
;;;96     	NVIC_EnableIRQ(EINT0_IRQn);
000014  2002              MOVS     r0,#2
000016  f7fffffe          BL       NVIC_EnableIRQ
;;;97     }
00001a  bd10              POP      {r4,pc}
;;;98     
                          ENDP


                          AREA ||i.GPIO_EnableEINT1||, CODE, READONLY, ALIGN=1

                  GPIO_EnableEINT1 PROC
;;;118      */
;;;119    void GPIO_EnableEINT1(GPIO_TypeDef *port, uint32_t bit, uint32_t TriggerType, uint32_t Mode)
000000  b510              PUSH     {r4,lr}
;;;120    {
;;;121    	port->IER |= TriggerType;
000002  69c4              LDR      r4,[r0,#0x1c]
000004  4314              ORRS     r4,r4,r2
000006  61c4              STR      r4,[r0,#0x1c]
;;;122    	port->IMD = (port->IMD & ~(1 << bit) | Mode);
000008  6982              LDR      r2,[r0,#0x18]
00000a  2401              MOVS     r4,#1
00000c  408c              LSLS     r4,r4,r1
00000e  43a2              BICS     r2,r2,r4
000010  431a              ORRS     r2,r2,r3
000012  6182              STR      r2,[r0,#0x18]
;;;123    	NVIC_EnableIRQ(EINT1_IRQn);
000014  2003              MOVS     r0,#3
000016  f7fffffe          BL       NVIC_EnableIRQ
;;;124    }
00001a  bd10              POP      {r4,pc}
;;;125    
                          ENDP


                          AREA ||i.GPIO_EnableInt||, CODE, READONLY, ALIGN=2

                  GPIO_EnableInt PROC
;;;42       */
;;;43     void GPIO_EnableInt(GPIO_TypeDef *port, uint32_t bit, uint32_t TriggerType, uint32_t Mode)
000000  b510              PUSH     {r4,lr}
;;;44     {
000002  4604              MOV      r4,r0
;;;45     	port->IER |= TriggerType;
000004  69c0              LDR      r0,[r0,#0x1c]
000006  4310              ORRS     r0,r0,r2
000008  61e0              STR      r0,[r4,#0x1c]
;;;46     	port->IMD = (port->IMD & ~(1 << bit) | Mode);
00000a  69a0              LDR      r0,[r4,#0x18]
00000c  2201              MOVS     r2,#1
00000e  408a              LSLS     r2,r2,r1
000010  4390              BICS     r0,r0,r2
000012  4318              ORRS     r0,r0,r3
000014  61a0              STR      r0,[r4,#0x18]
;;;47     
;;;48     	/* Enable the relative interrupt of M0 */
;;;49     	if ((port == GPIOA) || (port == GPIOB) || (port == GPIOC))
000016  480e              LDR      r0,|L6.80|
000018  4284              CMP      r4,r0
00001a  d007              BEQ      |L6.44|
00001c  480c              LDR      r0,|L6.80|
00001e  3040              ADDS     r0,r0,#0x40
000020  4284              CMP      r4,r0
000022  d003              BEQ      |L6.44|
000024  480a              LDR      r0,|L6.80|
000026  3080              ADDS     r0,r0,#0x80
000028  4284              CMP      r4,r0
00002a  d102              BNE      |L6.50|
                  |L6.44|
;;;50     	{
;;;51     		//NVIC_SetPriority(GPABC_IRQn, (1<<__NVIC_PRIO_BITS) - 2);
;;;52     		NVIC_EnableIRQ(GPABC_IRQn);
00002c  2004              MOVS     r0,#4
00002e  f7fffffe          BL       NVIC_EnableIRQ
                  |L6.50|
;;;53     	}
;;;54     
;;;55     	if ((port == GPIOD) || (port == GPIOE) || (port == GPIOF))
000032  4807              LDR      r0,|L6.80|
000034  30c0              ADDS     r0,r0,#0xc0
000036  4284              CMP      r4,r0
000038  d006              BEQ      |L6.72|
00003a  4806              LDR      r0,|L6.84|
00003c  4284              CMP      r4,r0
00003e  d003              BEQ      |L6.72|
000040  4804              LDR      r0,|L6.84|
000042  3040              ADDS     r0,r0,#0x40
000044  4284              CMP      r4,r0
000046  d102              BNE      |L6.78|
                  |L6.72|
;;;56     	{
;;;57     		//NVIC_SetPriority(GPDEF_IRQn, (1<<__NVIC_PRIO_BITS) - 2);
;;;58     		NVIC_EnableIRQ(GPDEF_IRQn);
000048  2005              MOVS     r0,#5
00004a  f7fffffe          BL       NVIC_EnableIRQ
                  |L6.78|
;;;59     	}
;;;60     }
00004e  bd10              POP      {r4,pc}
;;;61     
                          ENDP

                  |L6.80|
                          DCD      0x50004000
                  |L6.84|
                          DCD      0x50004100

                          AREA ||i.NVIC_DisableIRQ||, CODE, READONLY, ALIGN=2

                  NVIC_DisableIRQ PROC
;;;511     */
;;;512    __STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
000000  06c1              LSLS     r1,r0,#27
;;;513    {
;;;514      NVIC->ICER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
000002  0ec9              LSRS     r1,r1,#27
000004  2001              MOVS     r0,#1
000006  4088              LSLS     r0,r0,r1
000008  4901              LDR      r1,|L7.16|
00000a  6008              STR      r0,[r1,#0]
;;;515    }
00000c  4770              BX       lr
;;;516    
                          ENDP

00000e  0000              DCW      0x0000
                  |L7.16|
                          DCD      0xe000e180

                          AREA ||i.NVIC_EnableIRQ||, CODE, READONLY, ALIGN=2

                  NVIC_EnableIRQ PROC
;;;499     */
;;;500    __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
000000  06c1              LSLS     r1,r0,#27
;;;501    {
;;;502      NVIC->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
000002  0ec9              LSRS     r1,r1,#27
000004  2001              MOVS     r0,#1
000006  4088              LSLS     r0,r0,r1
000008  4901              LDR      r1,|L8.16|
00000a  6008              STR      r0,[r1,#0]
;;;503    }
00000c  4770              BX       lr
;;;504    
                          ENDP

00000e  0000              DCW      0x0000
                  |L8.16|
                          DCD      0xe000e100

;*** Start embedded assembler ***

#line 1 "..\\bsp\\Driver\\nano1xx_gpio.c"
	AREA ||.rev16_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___14_nano1xx_gpio_c_e6de6bf5____REV16|
#line 115 "C:\\Keil\\ARM\\CMSIS\\Include\\core_cmInstr.h"
|__asm___14_nano1xx_gpio_c_e6de6bf5____REV16| PROC
#line 116

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___14_nano1xx_gpio_c_e6de6bf5____REVSH|
#line 130
|__asm___14_nano1xx_gpio_c_e6de6bf5____REVSH| PROC
#line 131

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
