; generated by ARM C/C++ Compiler, 4.1 [Build 894]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\obj\drvadc.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\drvadc.d --cpu=Cortex-M0 --apcs=interwork -I..\inc -I..\drv -I..\bsp -I..\bsp\Cmsis -I..\bsp\Driver -I..\bsp\system -I..\lib -I..\lib\libtk -IC:\Keil\ARM\RV31\Inc -IC:\Keil\ARM\CMSIS\Include -D__LCDDISPLAY_BTL001_H --omf_browse=.\obj\drvadc.crf ..\bsp\Driver\DrvADC.c]
                          THUMB

                          AREA ||i.ADC_IRQHandler||, CODE, READONLY, ALIGN=2

                  ADC_IRQHandler PROC
;;;315    /*---------------------------------------------------------------------------------------------------------*/
;;;316    void ADC_IRQHandler(void)
000000  b5f8              PUSH     {r3-r7,lr}
;;;317    {
;;;318    
;;;319    	uint32_t reg = ADC->SR;
000002  4f13              LDR      r7,|L1.80|
000004  69bc              LDR      r4,[r7,#0x18]
;;;320    	
;;;321    	if((ADC->CR_BITS.ADIE == 1) && (reg & 1) && g_ptADCCallBack != NULL)
000006  68b8              LDR      r0,[r7,#8]
;;;322    		g_ptADCCallBack(g_pu32UserData[0]);
000008  4e12              LDR      r6,|L1.84|
00000a  4d13              LDR      r5,|L1.88|
00000c  0780              LSLS     r0,r0,#30             ;321
00000e  d506              BPL      |L1.30|
000010  07e0              LSLS     r0,r4,#31             ;321
000012  d004              BEQ      |L1.30|
000014  6829              LDR      r1,[r5,#0]            ;321  ; g_ptADCCallBack
000016  2900              CMP      r1,#0                 ;321
000018  d001              BEQ      |L1.30|
00001a  6830              LDR      r0,[r6,#0]  ; g_pu32UserData
00001c  4788              BLX      r1
                  |L1.30|
;;;323    	if((ADC->CMPR0_BITS.CMPIE == 1) && (reg & 2) && g_ptADCMP0CallBack != NULL)
00001e  6938              LDR      r0,[r7,#0x10]
000020  0780              LSLS     r0,r0,#30
000022  d506              BPL      |L1.50|
000024  07a0              LSLS     r0,r4,#30
000026  d504              BPL      |L1.50|
000028  6869              LDR      r1,[r5,#4]  ; g_ptADCMP0CallBack
00002a  2900              CMP      r1,#0
00002c  d001              BEQ      |L1.50|
;;;324    		g_ptADCMP0CallBack(g_pu32UserData[1]);	
00002e  6870              LDR      r0,[r6,#4]  ; g_pu32UserData
000030  4788              BLX      r1
                  |L1.50|
;;;325    	if((ADC->CMPR1_BITS.CMPIE == 1) && (reg & 4) && g_ptADCMP1CallBack != NULL)
000032  6978              LDR      r0,[r7,#0x14]
000034  0780              LSLS     r0,r0,#30
000036  d506              BPL      |L1.70|
000038  0760              LSLS     r0,r4,#29
00003a  d504              BPL      |L1.70|
00003c  68a9              LDR      r1,[r5,#8]  ; g_ptADCMP1CallBack
00003e  2900              CMP      r1,#0
000040  d001              BEQ      |L1.70|
;;;326    		g_ptADCMP1CallBack(g_pu32UserData[2]);	
000042  68b0              LDR      r0,[r6,#8]  ; g_pu32UserData
000044  4788              BLX      r1
                  |L1.70|
;;;327    	
;;;328    	ADC->SR = reg & 0x7;
000046  0760              LSLS     r0,r4,#29
000048  0f40              LSRS     r0,r0,#29
00004a  61b8              STR      r0,[r7,#0x18]
;;;329    	return;
;;;330    
;;;331    }
00004c  bdf8              POP      {r3-r7,pc}
;;;332    
                          ENDP

00004e  0000              DCW      0x0000
                  |L1.80|
                          DCD      0x400e0040
                  |L1.84|
                          DCD      ||.bss||
                  |L1.88|
                          DCD      ||.data||

                          AREA ||i.DrvADC_Close||, CODE, READONLY, ALIGN=2

                  DrvADC_Close PROC
;;;84     /*---------------------------------------------------------------------------------------------------------*/
;;;85     void DrvADC_Close(void)
000000  4807              LDR      r0,|L2.32|
;;;86     {     
;;;87     	ADC->CHER = 0;
000002  2100              MOVS     r1,#0
000004  60c1              STR      r1,[r0,#0xc]
;;;88     	ADC->CR = 0;
000006  6081              STR      r1,[r0,#8]
;;;89     	ADC->CMPR0 = 0;
000008  6101              STR      r1,[r0,#0x10]
;;;90     	ADC->CMPR1 = 0;
00000a  6141              STR      r1,[r0,#0x14]
;;;91     	CLK->APBCLK_BITS.ADC_EN = 0;         /* ADC engine clock disable */
00000c  4805              LDR      r0,|L2.36|
00000e  6881              LDR      r1,[r0,#8]
000010  04c2              LSLS     r2,r0,#19
000012  4391              BICS     r1,r1,r2
000014  6081              STR      r1,[r0,#8]
000016  4904              LDR      r1,|L2.40|
000018  0500              LSLS     r0,r0,#20
00001a  6008              STR      r0,[r1,#0]
;;;92     
;;;93     	NVIC_DisableIRQ(ADC_IRQn);
;;;94     }
00001c  4770              BX       lr
;;;95     
                          ENDP

00001e  0000              DCW      0x0000
                  |L2.32|
                          DCD      0x400e0040
                  |L2.36|
                          DCD      0x50000200
                  |L2.40|
                          DCD      0xe000e180

                          AREA ||i.DrvADC_ConfigCal||, CODE, READONLY, ALIGN=2

                  DrvADC_ConfigCal PROC
;;;757      */
;;;758    void DrvADC_ConfigCal(uint8_t enable, E_ADC_CAL mode)
000000  b510              PUSH     {r4,lr}
;;;759    {
;;;760    	ADC->CALCTL_BITS.CALSEL = mode;
000002  4a09              LDR      r2,|L3.40|
000004  6a93              LDR      r3,[r2,#0x28]
000006  2408              MOVS     r4,#8
000008  07c9              LSLS     r1,r1,#31
00000a  43a3              BICS     r3,r3,r4
00000c  0f09              LSRS     r1,r1,#28
00000e  430b              ORRS     r3,r3,r1
000010  6293              STR      r3,[r2,#0x28]
;;;761    	ADC->CALCTL_BITS.CALEN = enable == 0 ? 0 : 1;
000012  2800              CMP      r0,#0
000014  6a90              LDR      r0,[r2,#0x28]
000016  d002              BEQ      |L3.30|
000018  2101              MOVS     r1,#1
00001a  4308              ORRS     r0,r0,r1
00001c  e001              B        |L3.34|
                  |L3.30|
00001e  0840              LSRS     r0,r0,#1
000020  0040              LSLS     r0,r0,#1
                  |L3.34|
000022  6290              STR      r0,[r2,#0x28]
;;;762    
;;;763    	return;
;;;764    }
000024  bd10              POP      {r4,pc}
;;;765    
                          ENDP

000026  0000              DCW      0x0000
                  |L3.40|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_DisableADCCmp0||, CODE, READONLY, ALIGN=2

                  DrvADC_DisableADCCmp0 PROC
;;;619    /*-----------------------------------------------------------------------------------------------------------*/
;;;620    void DrvADC_DisableADCCmp0(void)
000000  4802              LDR      r0,|L4.12|
;;;621    {
;;;622    	ADC->CMPR0_BITS.CMPEN = 0;
000002  6901              LDR      r1,[r0,#0x10]
000004  0849              LSRS     r1,r1,#1
000006  0049              LSLS     r1,r1,#1
000008  6101              STR      r1,[r0,#0x10]
;;;623    }
00000a  4770              BX       lr
;;;624    
                          ENDP

                  |L4.12|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_DisableADCCmp0Int||, CODE, READONLY, ALIGN=2

                  DrvADC_DisableADCCmp0Int PROC
;;;258    /*---------------------------------------------------------------------------------------------------------*/
;;;259    void DrvADC_DisableADCCmp0Int(void)
000000  4802              LDR      r0,|L5.12|
;;;260    {
;;;261    	ADC->CMPR0_BITS.CMPIE = 0;
000002  6901              LDR      r1,[r0,#0x10]
000004  2202              MOVS     r2,#2
000006  4391              BICS     r1,r1,r2
000008  6101              STR      r1,[r0,#0x10]
;;;262    }
00000a  4770              BX       lr
;;;263    
                          ENDP

                  |L5.12|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_DisableADCCmp1||, CODE, READONLY, ALIGN=2

                  DrvADC_DisableADCCmp1 PROC
;;;671    /*-----------------------------------------------------------------------------------------------------------*/
;;;672    void DrvADC_DisableADCCmp1(void)
000000  4802              LDR      r0,|L6.12|
;;;673    {
;;;674    	ADC->CMPR1_BITS.CMPEN = 0;
000002  6941              LDR      r1,[r0,#0x14]
000004  0849              LSRS     r1,r1,#1
000006  0049              LSLS     r1,r1,#1
000008  6141              STR      r1,[r0,#0x14]
;;;675    }
00000a  4770              BX       lr
;;;676    
                          ENDP

                  |L6.12|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_DisableADCCmp1Int||, CODE, READONLY, ALIGN=2

                  DrvADC_DisableADCCmp1Int PROC
;;;297    /*---------------------------------------------------------------------------------------------------------*/
;;;298    void DrvADC_DisableADCCmp1Int(void)
000000  4802              LDR      r0,|L7.12|
;;;299    {
;;;300    	ADC->CMPR1_BITS.CMPIE = 0;
000002  6941              LDR      r1,[r0,#0x14]
000004  2202              MOVS     r2,#2
000006  4391              BICS     r1,r1,r2
000008  6141              STR      r1,[r0,#0x14]
;;;301    }
00000a  4770              BX       lr
;;;302    
                          ENDP

                  |L7.12|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_DisableADCInt||, CODE, READONLY, ALIGN=2

                  DrvADC_DisableADCInt PROC
;;;219    /*---------------------------------------------------------------------------------------------------------*/
;;;220    void DrvADC_DisableADCInt(void)
000000  4802              LDR      r0,|L8.12|
;;;221    {
;;;222    	ADC->CR_BITS.ADIE = 0;
000002  6881              LDR      r1,[r0,#8]
000004  2202              MOVS     r2,#2
000006  4391              BICS     r1,r1,r2
000008  6081              STR      r1,[r0,#8]
;;;223    }
00000a  4770              BX       lr
;;;224    
                          ENDP

                  |L8.12|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_DisableExtTrigger||, CODE, READONLY, ALIGN=2

                  DrvADC_DisableExtTrigger PROC
;;;418    /*---------------------------------------------------------------------------------------------------------*/
;;;419    void DrvADC_DisableExtTrigger(void)
000000  4802              LDR      r0,|L9.12|
;;;420    {
;;;421    	ADC->CR_BITS.TRGEN = 0;
000002  6881              LDR      r1,[r0,#8]
000004  1582              ASRS     r2,r0,#22
000006  4391              BICS     r1,r1,r2
000008  6081              STR      r1,[r0,#8]
;;;422    }
00000a  4770              BX       lr
;;;423    
                          ENDP

                  |L9.12|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_DisablePDMA||, CODE, READONLY, ALIGN=2

                  DrvADC_DisablePDMA PROC
;;;526    /*-----------------------------------------------------------------------------------------------------------*/
;;;527    void DrvADC_DisablePDMA(void)
000000  4802              LDR      r0,|L10.12|
;;;528    {
;;;529    	// we don't restore ADIE here. application should take care of it.
;;;530        ADC->CR_BITS.PTEN = 0;
000002  6881              LDR      r1,[r0,#8]
000004  1542              ASRS     r2,r0,#21
000006  4391              BICS     r1,r1,r2
000008  6081              STR      r1,[r0,#8]
;;;531    }
00000a  4770              BX       lr
;;;532    
                          ENDP

                  |L10.12|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_DisableTimerTrigger||, CODE, READONLY, ALIGN=2

                  DrvADC_DisableTimerTrigger PROC
;;;744      */
;;;745    void DrvADC_DisableTimerTrigger(void)
000000  4803              LDR      r0,|L11.16|
;;;746    {	
;;;747    	ADC->CR_BITS.TMTRGMOD = 0;	
000002  6881              LDR      r1,[r0,#8]
000004  2201              MOVS     r2,#1
000006  03d2              LSLS     r2,r2,#15
000008  4391              BICS     r1,r1,r2
00000a  6081              STR      r1,[r0,#8]
;;;748    
;;;749    }
00000c  4770              BX       lr
;;;750    
                          ENDP

00000e  0000              DCW      0x0000
                  |L11.16|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_EnableADCCmp0||, CODE, READONLY, ALIGN=2

                  DrvADC_EnableADCCmp0 PROC
;;;590    /*-----------------------------------------------------------------------------------------------------------*/
;;;591    int32_t DrvADC_EnableADCCmp0(uint8_t u8CmpChannelNum, 
000000  0412              LSLS     r2,r2,#16
;;;592                                 E_ADC_CMP_CONDITION CmpCondition, 
;;;593    							 uint16_t u16CmpData, 
;;;594    							 uint8_t u8CmpMatchCount)
;;;595    {
;;;596    	assert_param(u8CmpChannelNum < ADC_CH_NUM);
;;;597    	
;;;598    	assert_param(u16CmpData <= 0x0FFF);
;;;599    	
;;;600    	assert_param(u8CmpMatchCount <= 0x0F);
;;;601    	
;;;602    	ADC->CMPR0 |= ((u16CmpData << 16) | (u8CmpMatchCount << 8) | (u8CmpChannelNum << 3) | CmpCondition);
000002  021b              LSLS     r3,r3,#8
000004  431a              ORRS     r2,r2,r3
000006  00c0              LSLS     r0,r0,#3
000008  4302              ORRS     r2,r2,r0
00000a  4805              LDR      r0,|L12.32|
00000c  430a              ORRS     r2,r2,r1
00000e  6901              LDR      r1,[r0,#0x10]
000010  430a              ORRS     r2,r2,r1
000012  6102              STR      r2,[r0,#0x10]
;;;603    	ADC->CMPR0_BITS.CMPEN = 1;
000014  6901              LDR      r1,[r0,#0x10]
000016  2201              MOVS     r2,#1
000018  4311              ORRS     r1,r1,r2
00001a  6101              STR      r1,[r0,#0x10]
;;;604    	
;;;605    	return E_SUCCESS;
00001c  2000              MOVS     r0,#0
;;;606    }
00001e  4770              BX       lr
;;;607    
                          ENDP

                  |L12.32|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_EnableADCCmp0Int||, CODE, READONLY, ALIGN=2

                  DrvADC_EnableADCCmp0Int PROC
;;;237    /*---------------------------------------------------------------------------------------------------------*/
;;;238    void DrvADC_EnableADCCmp0Int(DRVADC_ADCMP0_CALLBACK Callback, uint32_t u32UserData)
000000  4a06              LDR      r2,|L13.28|
;;;239    {
;;;240    	g_ptADCMP0CallBack = Callback;
;;;241    	g_pu32UserData[1] = u32UserData;
000002  6050              STR      r0,[r2,#4]  ; g_ptADCMP0CallBack
000004  4806              LDR      r0,|L13.32|
;;;242        ADC->SR = 2;      /* clear the ADC comparator 0 interrupt flag for safe */
000006  6041              STR      r1,[r0,#4]  ; g_pu32UserData
000008  4806              LDR      r0,|L13.36|
00000a  2102              MOVS     r1,#2
00000c  6181              STR      r1,[r0,#0x18]
;;;243    	ADC->CMPR0_BITS.CMPIE = 1;
00000e  6902              LDR      r2,[r0,#0x10]
000010  430a              ORRS     r2,r2,r1
000012  6102              STR      r2,[r0,#0x10]
000014  4904              LDR      r1,|L13.40|
000016  05c0              LSLS     r0,r0,#23
000018  6008              STR      r0,[r1,#0]
;;;244    	NVIC_EnableIRQ(ADC_IRQn);
;;;245    }
00001a  4770              BX       lr
;;;246    
                          ENDP

                  |L13.28|
                          DCD      ||.data||
                  |L13.32|
                          DCD      ||.bss||
                  |L13.36|
                          DCD      0x400e0040
                  |L13.40|
                          DCD      0xe000e100

                          AREA ||i.DrvADC_EnableADCCmp1||, CODE, READONLY, ALIGN=2

                  DrvADC_EnableADCCmp1 PROC
;;;642    /*-----------------------------------------------------------------------------------------------------------*/
;;;643    int32_t DrvADC_EnableADCCmp1(uint8_t u8CmpChannelNum, 
000000  0412              LSLS     r2,r2,#16
;;;644                                 E_ADC_CMP_CONDITION CmpCondition, 
;;;645    							 uint16_t u16CmpData, 
;;;646    							 uint8_t u8CmpMatchCount)
;;;647    {
;;;648    	assert_param(u8CmpChannelNum < ADC_CH_NUM);
;;;649    	
;;;650    	assert_param(u16CmpData <= 0x0FFF);
;;;651    	
;;;652    	assert_param(u8CmpMatchCount <= 0x0F);
;;;653    		
;;;654    	ADC->CMPR1 |= ((u16CmpData << 16) | (u8CmpMatchCount << 8) | (u8CmpChannelNum << 3) | CmpCondition);
000002  021b              LSLS     r3,r3,#8
000004  431a              ORRS     r2,r2,r3
000006  00c0              LSLS     r0,r0,#3
000008  4302              ORRS     r2,r2,r0
00000a  4805              LDR      r0,|L14.32|
00000c  430a              ORRS     r2,r2,r1
00000e  6941              LDR      r1,[r0,#0x14]
000010  430a              ORRS     r2,r2,r1
000012  6142              STR      r2,[r0,#0x14]
;;;655    	ADC->CMPR1_BITS.CMPEN = 1;
000014  6941              LDR      r1,[r0,#0x14]
000016  2201              MOVS     r2,#1
000018  4311              ORRS     r1,r1,r2
00001a  6141              STR      r1,[r0,#0x14]
;;;656    	
;;;657    	return E_SUCCESS;
00001c  2000              MOVS     r0,#0
;;;658    }
00001e  4770              BX       lr
;;;659    
                          ENDP

                  |L14.32|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_EnableADCCmp1Int||, CODE, READONLY, ALIGN=2

                  DrvADC_EnableADCCmp1Int PROC
;;;276    /*---------------------------------------------------------------------------------------------------------*/
;;;277    void DrvADC_EnableADCCmp1Int(DRVADC_ADCMP1_CALLBACK Callback, uint32_t u32UserData)
000000  4a07              LDR      r2,|L15.32|
;;;278    {
;;;279    	g_ptADCMP1CallBack = Callback;
;;;280    	g_pu32UserData[2] = u32UserData;
000002  6090              STR      r0,[r2,#8]  ; g_ptADCMP1CallBack
000004  4807              LDR      r0,|L15.36|
;;;281    	ADC->SR = 4;        /* clear the ADC comparator 1 interrupt flag for safe */
000006  6081              STR      r1,[r0,#8]  ; g_pu32UserData
000008  4807              LDR      r0,|L15.40|
00000a  2104              MOVS     r1,#4
00000c  6181              STR      r1,[r0,#0x18]
;;;282    	ADC->CMPR1_BITS.CMPIE = 1;
00000e  6941              LDR      r1,[r0,#0x14]
000010  2202              MOVS     r2,#2
000012  4311              ORRS     r1,r1,r2
000014  6141              STR      r1,[r0,#0x14]
000016  4905              LDR      r1,|L15.44|
000018  05c0              LSLS     r0,r0,#23
00001a  6008              STR      r0,[r1,#0]
;;;283    	NVIC_EnableIRQ(ADC_IRQn);
;;;284    }
00001c  4770              BX       lr
;;;285    
                          ENDP

00001e  0000              DCW      0x0000
                  |L15.32|
                          DCD      ||.data||
                  |L15.36|
                          DCD      ||.bss||
                  |L15.40|
                          DCD      0x400e0040
                  |L15.44|
                          DCD      0xe000e100

                          AREA ||i.DrvADC_EnableADCInt||, CODE, READONLY, ALIGN=2

                  DrvADC_EnableADCInt PROC
;;;198    /*---------------------------------------------------------------------------------------------------------*/
;;;199    void DrvADC_EnableADCInt(DRVADC_ADC_CALLBACK Callback, uint32_t u32UserData)
000000  4a07              LDR      r2,|L16.32|
;;;200    {
;;;201    	g_ptADCCallBack = Callback;
;;;202    	g_pu32UserData[0] = u32UserData;
000002  6010              STR      r0,[r2,#0]  ; g_ptADCCallBack
000004  4807              LDR      r0,|L16.36|
;;;203    	ADC->SR = 1;  // clear interrupt flag
000006  6001              STR      r1,[r0,#0]  ; g_pu32UserData
000008  4807              LDR      r0,|L16.40|
00000a  2101              MOVS     r1,#1
00000c  6181              STR      r1,[r0,#0x18]
;;;204    	ADC->CR_BITS.ADIE = 1;
00000e  6881              LDR      r1,[r0,#8]
000010  2202              MOVS     r2,#2
000012  4311              ORRS     r1,r1,r2
000014  6081              STR      r1,[r0,#8]
000016  4905              LDR      r1,|L16.44|
000018  05c0              LSLS     r0,r0,#23
00001a  6008              STR      r0,[r1,#0]
;;;205    	NVIC_EnableIRQ(ADC_IRQn);
;;;206    }
00001c  4770              BX       lr
;;;207    
                          ENDP

00001e  0000              DCW      0x0000
                  |L16.32|
                          DCD      ||.data||
                  |L16.36|
                          DCD      ||.bss||
                  |L16.40|
                          DCD      0x400e0040
                  |L16.44|
                          DCD      0xe000e100

                          AREA ||i.DrvADC_EnableExtTrigger||, CODE, READONLY, ALIGN=2

                  DrvADC_EnableExtTrigger PROC
;;;399    /*---------------------------------------------------------------------------------------------------------*/
;;;400    void DrvADC_EnableExtTrigger(E_ADC_EXT_TRI_COND TriggerCondition)
000000  4909              LDR      r1,|L17.40|
;;;401    {
;;;402    	ADC->CR_BITS.TRGCOND = TriggerCondition;
000002  688a              LDR      r2,[r1,#8]
000004  23c0              MOVS     r3,#0xc0
000006  0780              LSLS     r0,r0,#30
000008  439a              BICS     r2,r2,r3
00000a  0e00              LSRS     r0,r0,#24
00000c  4302              ORRS     r2,r2,r0
00000e  608a              STR      r2,[r1,#8]
;;;403        GCR->PB_H_MFP_BITS.PB8 = 1;	
000010  2005              MOVS     r0,#5
000012  0700              LSLS     r0,r0,#28
000014  6bc2              LDR      r2,[r0,#0x3c]
000016  08d2              LSRS     r2,r2,#3
000018  00d2              LSLS     r2,r2,#3
00001a  1c52              ADDS     r2,r2,#1
00001c  63c2              STR      r2,[r0,#0x3c]
;;;404    	ADC->CR_BITS.TRGEN = 1;
00001e  6888              LDR      r0,[r1,#8]
000020  158a              ASRS     r2,r1,#22
000022  4310              ORRS     r0,r0,r2
000024  6088              STR      r0,[r1,#8]
;;;405    }
000026  4770              BX       lr
;;;406    
                          ENDP

                  |L17.40|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_EnablePDMA||, CODE, READONLY, ALIGN=2

                  DrvADC_EnablePDMA PROC
;;;508    /*------------------------------------------------------------------------------------------------------------*/
;;;509    void DrvADC_EnablePDMA(void)
000000  4804              LDR      r0,|L18.20|
;;;510    {
;;;511    	ADC->CR_BITS.ADIE = 0; // adc interrupt enable must be disabled for using pdma	
000002  6881              LDR      r1,[r0,#8]
000004  2202              MOVS     r2,#2
000006  4391              BICS     r1,r1,r2
000008  6081              STR      r1,[r0,#8]
;;;512        ADC->CR_BITS.PTEN = 1;
00000a  6881              LDR      r1,[r0,#8]
00000c  1542              ASRS     r2,r0,#21
00000e  4311              ORRS     r1,r1,r2
000010  6081              STR      r1,[r0,#8]
;;;513    }
000012  4770              BX       lr
;;;514    
                          ENDP

                  |L18.20|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_EnableTimerTrigger||, CODE, READONLY, ALIGN=2

                  DrvADC_EnableTimerTrigger PROC
;;;721      */
;;;722    int32_t DrvADC_EnableTimerTrigger(S_ADC_TIMER_TRIGGER_CFG *cfg)
000000  490f              LDR      r1,|L19.64|
;;;723    {
;;;724    
;;;725    	
;;;726    	assert_param(cfg != NULL);
;;;727    	assert_param(cfg->conversion_cnt != 0);
;;;728    		
;;;729    	ADC->CR_BITS.TMSEL = cfg->src;
000002  688a              LDR      r2,[r1,#8]
000004  2303              MOVS     r3,#3
000006  031b              LSLS     r3,r3,#12
000008  439a              BICS     r2,r2,r3
00000a  7803              LDRB     r3,[r0,#0]
00000c  079b              LSLS     r3,r3,#30
00000e  0c9b              LSRS     r3,r3,#18
000010  431a              ORRS     r2,r2,r3
000012  608a              STR      r2,[r1,#8]
;;;730    	ADC->CR_BITS.TMPDMACNT = cfg->conversion_cnt - 1;
000014  688a              LDR      r2,[r1,#8]
000016  7840              LDRB     r0,[r0,#1]
000018  0212              LSLS     r2,r2,#8
00001a  23ff              MOVS     r3,#0xff
00001c  0a12              LSRS     r2,r2,#8
00001e  0600              LSLS     r0,r0,#24
000020  061b              LSLS     r3,r3,#24
000022  18c0              ADDS     r0,r0,r3
000024  4302              ORRS     r2,r2,r0
000026  608a              STR      r2,[r1,#8]
;;;731        ADC->CR_BITS.ADEN = 0;
000028  6888              LDR      r0,[r1,#8]
00002a  0840              LSRS     r0,r0,#1
00002c  0040              LSLS     r0,r0,#1
00002e  6088              STR      r0,[r1,#8]
;;;732    
;;;733    	
;;;734    	ADC->CR_BITS.TMTRGMOD = 1;	
000030  6888              LDR      r0,[r1,#8]
000032  2201              MOVS     r2,#1
000034  03d2              LSLS     r2,r2,#15
000036  4310              ORRS     r0,r0,r2
000038  6088              STR      r0,[r1,#8]
;;;735    
;;;736    	return(E_SUCCESS);
00003a  2000              MOVS     r0,#0
;;;737    
;;;738    }
00003c  4770              BX       lr
;;;739    
                          ENDP

00003e  0000              DCW      0x0000
                  |L19.64|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_GetCalWord||, CODE, READONLY, ALIGN=2

                  DrvADC_GetCalWord PROC
;;;818      */
;;;819    void DrvADC_GetCalWord(uint8_t *data)
000000  4902              LDR      r1,|L20.12|
;;;820    {
;;;821    	assert_param(data != NULL);
;;;822    
;;;823    	*data = (uint8_t)(ADC->CALWORD & 0x7F);
000002  6ac9              LDR      r1,[r1,#0x2c]
000004  0649              LSLS     r1,r1,#25
000006  0e49              LSRS     r1,r1,#25
000008  7001              STRB     r1,[r0,#0]
;;;824    
;;;825    
;;;826    }
00000a  4770              BX       lr
;;;827    
                          ENDP

                  |L20.12|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_GetConversionData||, CODE, READONLY, ALIGN=2

                  DrvADC_GetConversionData PROC
;;;491    /*--------------------------------------------------------------------------------------------------------------------*/
;;;492    int32_t DrvADC_GetConversionData(uint8_t u8ChannelNum)
000000  4903              LDR      r1,|L21.16|
;;;493    {
;;;494    	return(*(__IO uint32_t *)(ADC_BASE + (u8ChannelNum * 4)) & 0xFFF);
000002  0080              LSLS     r0,r0,#2
000004  1840              ADDS     r0,r0,r1
000006  6800              LDR      r0,[r0,#0]
000008  0500              LSLS     r0,r0,#20
00000a  0d00              LSRS     r0,r0,#20
;;;495    }
00000c  4770              BX       lr
;;;496    
                          ENDP

00000e  0000              DCW      0x0000
                  |L21.16|
                          DCD      0x400e0000

                          AREA ||i.DrvADC_GetConversionRate||, CODE, READONLY, ALIGN=2

                  DrvADC_GetConversionRate PROC
;;;345    /*---------------------------------------------------------------------------------------------------------*/
;;;346    uint32_t DrvADC_GetConversionRate(uint8_t u8Ch)
000000  b570              PUSH     {r4-r6,lr}
;;;347    {
000002  4604              MOV      r4,r0
;;;348    	uint32_t clk, smpl, div;
;;;349    
;;;350    	assert_param(u8Ch < ADC_CH_NUM);
;;;351    
;;;352    	div = CLK->CLKDIV0_BITS.ADC_N + 1;
000004  481b              LDR      r0,|L22.116|
000006  69c1              LDR      r1,[r0,#0x1c]
000008  0209              LSLS     r1,r1,#8
00000a  0e0d              LSRS     r5,r1,#24
;;;353    
;;;354    	if( CLK->CLKSEL1_BITS.ADC_S == 0 )           /* external 12MHz crystal clock */
00000c  6941              LDR      r1,[r0,#0x14]
00000e  1c6d              ADDS     r5,r5,#1              ;352
000010  0709              LSLS     r1,r1,#28
;;;355    	{
;;;356    		clk = __XTAL/div;
000012  4a19              LDR      r2,|L22.120|
000014  0f89              LSRS     r1,r1,#30             ;354
000016  d009              BEQ      |L22.44|
;;;357    	}
;;;358        else if( CLK->CLKSEL1_BITS.ADC_S == 1 )  
000018  6941              LDR      r1,[r0,#0x14]
00001a  0709              LSLS     r1,r1,#28
00001c  0f89              LSRS     r1,r1,#30
00001e  2901              CMP      r1,#1
000020  d007              BEQ      |L22.50|
;;;359        {
;;;360            clk =  __RTC_XTAL/div;
;;;361        }
;;;362    	else if( CLK->CLKSEL1_BITS.ADC_S == 2 )      /* PLL clock */
000022  6940              LDR      r0,[r0,#0x14]
000024  0700              LSLS     r0,r0,#28
000026  0f80              LSRS     r0,r0,#30
000028  2802              CMP      r0,#2
00002a  d006              BEQ      |L22.58|
                  |L22.44|
00002c  4629              MOV      r1,r5                 ;356
00002e  4610              MOV      r0,r2                 ;356
000030  e006              B        |L22.64|
                  |L22.50|
000032  2001              MOVS     r0,#1                 ;360
000034  4629              MOV      r1,r5                 ;360
000036  03c0              LSLS     r0,r0,#15             ;360
000038  e002              B        |L22.64|
                  |L22.58|
;;;363    	{
;;;364    		clk =  DrvSYS_GetPLLClockFreq()/div;
00003a  f7fffffe          BL       DrvSYS_GetPLLClockFreq
00003e  4629              MOV      r1,r5
                  |L22.64|
000040  f7fffffe          BL       __aeabi_uidivmod
;;;365    	}
;;;366    	else                                       /* internal 12MHz RC oscillator clock */
;;;367    	{
;;;368    		clk = __IRC12M/div;
;;;369    	}
;;;370    
;;;371    	if(u8Ch < 8)
;;;372    		smpl = (ADC->SMPLCNT0 >> (4 * u8Ch)) & 0xF;
000044  490d              LDR      r1,|L22.124|
000046  2c08              CMP      r4,#8                 ;371
000048  d202              BCS      |L22.80|
00004a  6b09              LDR      r1,[r1,#0x30]
00004c  00a2              LSLS     r2,r4,#2
00004e  e005              B        |L22.92|
                  |L22.80|
;;;373    	else {
;;;374    		if(u8Ch > 11)
000050  2c0b              CMP      r4,#0xb
000052  d900              BLS      |L22.86|
;;;375    			u8Ch = 11;
000054  240b              MOVS     r4,#0xb
                  |L22.86|
;;;376    		smpl = (ADC->SMPLCNT1 >> (4 * (u8Ch - 8))) & 0xF;
000056  00a2              LSLS     r2,r4,#2
000058  6b49              LDR      r1,[r1,#0x34]
00005a  3a20              SUBS     r2,r2,#0x20
                  |L22.92|
00005c  40d1              LSRS     r1,r1,r2
00005e  0709              LSLS     r1,r1,#28
000060  0f09              LSRS     r1,r1,#28
;;;377    	}
;;;378    
;;;379    	if(smpl > 0)
000062  d003              BEQ      |L22.108|
;;;380    		smpl = 1 << (smpl - 1);
000064  1e49              SUBS     r1,r1,#1
000066  2201              MOVS     r2,#1
000068  408a              LSLS     r2,r2,r1
00006a  4611              MOV      r1,r2
                  |L22.108|
;;;381    		
;;;382    	return(clk / (19 + smpl));		
00006c  3113              ADDS     r1,r1,#0x13
00006e  f7fffffe          BL       __aeabi_uidivmod
;;;383    
;;;384    }
000072  bd70              POP      {r4-r6,pc}
;;;385    
                          ENDP

                  |L22.116|
                          DCD      0x50000200
                  |L22.120|
                          DCD      0x00b71b00
                  |L22.124|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_GetVersion||, CODE, READONLY, ALIGN=1

                  DrvADC_GetVersion PROC
;;;688    /*-----------------------------------------------------------------------------------------------------------*/
;;;689    uint32_t DrvADC_GetVersion (void)
000000  2001              MOVS     r0,#1
;;;690    {
;;;691    	return DRVADC_VERSION_NUM;
000002  0400              LSLS     r0,r0,#16
;;;692    }
000004  4770              BX       lr
;;;693    
                          ENDP


                          AREA ||i.DrvADC_IsCalDone||, CODE, READONLY, ALIGN=2

                  DrvADC_IsCalDone PROC
;;;790      */
;;;791    int8_t DrvADC_IsCalDone(void)
000000  4802              LDR      r0,|L24.12|
;;;792    {
;;;793    	return(ADC->CALCTL_BITS.CALDONE);
000002  6a80              LDR      r0,[r0,#0x28]
000004  0740              LSLS     r0,r0,#29
000006  0fc0              LSRS     r0,r0,#31
;;;794    
;;;795    }
000008  4770              BX       lr
;;;796    
                          ENDP

00000a  0000              DCW      0x0000
                  |L24.12|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_IsConversionDone||, CODE, READONLY, ALIGN=2

                  DrvADC_IsConversionDone PROC
;;;470    /*---------------------------------------------------------------------------------------------------------*/
;;;471    uint32_t DrvADC_IsConversionDone(void)
000000  4802              LDR      r0,|L25.12|
;;;472    {
;;;473    	if(ADC->SR_BITS.ADF==0)
000002  6980              LDR      r0,[r0,#0x18]
000004  07c0              LSLS     r0,r0,#31
000006  d000              BEQ      |L25.10|
;;;474    		return FALSE;
;;;475    	else
;;;476    		return TRUE;
000008  2001              MOVS     r0,#1
                  |L25.10|
;;;477    }
00000a  4770              BX       lr
;;;478    
                          ENDP

                  |L25.12|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_IsDataOverrun||, CODE, READONLY, ALIGN=2

                  DrvADC_IsDataOverrun PROC
;;;565    /*---------------------------------------------------------------------------------------------------------*/
;;;566    uint32_t DrvADC_IsDataOverrun(uint8_t u8ChannelNum)
000000  4903              LDR      r1,|L26.16|
;;;567    {	
;;;568    	assert_param(u8ChannelNum < ADC_CH_NUM);
;;;569    
;;;570    	return((*(__IO uint32_t *)(ADC_BASE + (u8ChannelNum * 4)) & 0x20000) ? TRUE : FALSE);	
000002  0080              LSLS     r0,r0,#2
000004  1840              ADDS     r0,r0,r1
000006  6800              LDR      r0,[r0,#0]
000008  0380              LSLS     r0,r0,#14
00000a  0fc0              LSRS     r0,r0,#31
;;;571    }
00000c  4770              BX       lr
;;;572    
                          ENDP

00000e  0000              DCW      0x0000
                  |L26.16|
                          DCD      0x400e0000

                          AREA ||i.DrvADC_IsDataValid||, CODE, READONLY, ALIGN=2

                  DrvADC_IsDataValid PROC
;;;545    /*---------------------------------------------------------------------------------------------------------*/
;;;546    uint32_t DrvADC_IsDataValid(uint8_t u8ChannelNum)
000000  4903              LDR      r1,|L27.16|
;;;547    {	
;;;548    	assert_param(u8ChannelNum < ADC_CH_NUM);
;;;549    
;;;550    	return((*(__IO uint32_t *)(ADC_BASE + (u8ChannelNum * 4)) & 0x10000) ? TRUE : FALSE);	
000002  0080              LSLS     r0,r0,#2
000004  1840              ADDS     r0,r0,r1
000006  6800              LDR      r0,[r0,#0]
000008  03c0              LSLS     r0,r0,#15
00000a  0fc0              LSRS     r0,r0,#31
;;;551    }
00000c  4770              BX       lr
;;;552    
                          ENDP

00000e  0000              DCW      0x0000
                  |L27.16|
                          DCD      0x400e0000

                          AREA ||i.DrvADC_Open||, CODE, READONLY, ALIGN=2

                  DrvADC_Open PROC
;;;45     /*--------------------------------------------------------------------------------------------------------------------*/
;;;46     void DrvADC_Open(E_ADC_INPUT_MODE InputMode,
000000  b5f0              PUSH     {r4-r7,lr}
;;;47     				E_ADC_OPERATION_MODE OpMode, 
;;;48     				uint32_t u32ChannelSelBitwise, 
;;;49     				E_ADC_CLK_SRC ClockSrc, 
;;;50     				uint8_t u8AdcDivisor,
;;;51     				E_ADC_REF eRef)
;;;52     {	
;;;53     
;;;54     	/* ADC clock source */
;;;55     	CLK->CLKSEL1_BITS.ADC_S = ClockSrc;	
000002  4c1b              LDR      r4,|L28.112|
000004  9f05              LDR      r7,[sp,#0x14]
000006  6966              LDR      r6,[r4,#0x14]
000008  250c              MOVS     r5,#0xc
00000a  079b              LSLS     r3,r3,#30
00000c  43ae              BICS     r6,r6,r5
00000e  0f1b              LSRS     r3,r3,#28
000010  431e              ORRS     r6,r6,r3
000012  6166              STR      r6,[r4,#0x14]
;;;56     	/* Set ADC divisor */
;;;57     	CLK->CLKDIV0_BITS.ADC_N = u8AdcDivisor;
000014  69e3              LDR      r3,[r4,#0x1c]
000016  26ff              MOVS     r6,#0xff
000018  0436              LSLS     r6,r6,#16
00001a  43b3              BICS     r3,r3,r6
00001c  043e              LSLS     r6,r7,#16
00001e  4333              ORRS     r3,r3,r6
000020  61e3              STR      r3,[r4,#0x1c]
;;;58     	/* ADC engine clock enable */
;;;59     	CLK->APBCLK_BITS.ADC_EN = 1;
000022  68a3              LDR      r3,[r4,#8]
000024  04e6              LSLS     r6,r4,#19
000026  4333              ORRS     r3,r3,r6
000028  60a3              STR      r3,[r4,#8]
;;;60     	/* ADC enable */
;;;61     	ADC->CR_BITS.ADEN = 1;
00002a  4b12              LDR      r3,|L28.116|
00002c  689c              LDR      r4,[r3,#8]
00002e  2601              MOVS     r6,#1
000030  4334              ORRS     r4,r4,r6
000032  609c              STR      r4,[r3,#8]
;;;62     
;;;63     	ADC->CR_BITS.DIFF = InputMode;
000034  689c              LDR      r4,[r3,#8]
000036  151e              ASRS     r6,r3,#20
000038  07c0              LSLS     r0,r0,#31
00003a  43b4              BICS     r4,r4,r6
00003c  0d40              LSRS     r0,r0,#21
00003e  4304              ORRS     r4,r4,r0
000040  609c              STR      r4,[r3,#8]
;;;64     
;;;65     	ADC->CR_BITS.ADMD = OpMode;     
000042  6898              LDR      r0,[r3,#8]
000044  0789              LSLS     r1,r1,#30
000046  43a8              BICS     r0,r0,r5
000048  0f09              LSRS     r1,r1,#28
00004a  4308              ORRS     r0,r0,r1
00004c  6098              STR      r0,[r3,#8]
;;;66     
;;;67     	
;;;68     	ADC->CHER &= ~0x3FFFF;
00004e  68d8              LDR      r0,[r3,#0xc]
000050  0c80              LSRS     r0,r0,#18
000052  0480              LSLS     r0,r0,#18
000054  60d8              STR      r0,[r3,#0xc]
;;;69     	ADC->CHER |= u32ChannelSelBitwise;
000056  68d8              LDR      r0,[r3,#0xc]
000058  4310              ORRS     r0,r0,r2
00005a  60d8              STR      r0,[r3,#0xc]
;;;70     	ADC->CR_BITS.REFSEL = eRef;
00005c  6898              LDR      r0,[r3,#8]
00005e  03a9              LSLS     r1,r5,#14
000060  4388              BICS     r0,r0,r1
000062  9906              LDR      r1,[sp,#0x18]
000064  0789              LSLS     r1,r1,#30
000066  0b89              LSRS     r1,r1,#14
000068  4308              ORRS     r0,r0,r1
00006a  6098              STR      r0,[r3,#8]
;;;71     }
00006c  bdf0              POP      {r4-r7,pc}
;;;72     
                          ENDP

00006e  0000              DCW      0x0000
                  |L28.112|
                          DCD      0x50000200
                  |L28.116|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_Reset||, CODE, READONLY, ALIGN=2

                  DrvADC_Reset PROC
;;;698      */
;;;699    void DrvADC_Reset(void)
000000  2205              MOVS     r2,#5
;;;700    {
;;;701    	uint16_t volatile i;
;;;702    
;;;703    	GCR->IPRST_CTL2_BITS.ADC_RST = 1;
000002  0712              LSLS     r2,r2,#28
000004  68d0              LDR      r0,[r2,#0xc]
000006  2301              MOVS     r3,#1
000008  071b              LSLS     r3,r3,#28
00000a  4318              ORRS     r0,r0,r3
00000c  60d0              STR      r0,[r2,#0xc]
;;;704    	for(i = 0; i < 0x1000; i++);
00000e  2000              MOVS     r0,#0
000010  1419              ASRS     r1,r3,#16
                  |L29.18|
000012  1c40              ADDS     r0,r0,#1
000014  b280              UXTH     r0,r0
000016  4288              CMP      r0,r1
000018  d3fb              BCC      |L29.18|
;;;705    	GCR->IPRST_CTL2_BITS.ADC_RST = 0;
00001a  68d0              LDR      r0,[r2,#0xc]
00001c  4398              BICS     r0,r0,r3
00001e  60d0              STR      r0,[r2,#0xc]
;;;706    	
;;;707    	g_ptADCCallBack = g_ptADCMP0CallBack = g_ptADCMP1CallBack = NULL;
000020  4904              LDR      r1,|L29.52|
000022  2000              MOVS     r0,#0
000024  6088              STR      r0,[r1,#8]  ; g_ptADCMP1CallBack
000026  6048              STR      r0,[r1,#4]  ; g_ptADCMP0CallBack
;;;708    	g_pu32UserData[0] = g_pu32UserData[1] = g_pu32UserData[2] = 0;
000028  6008              STR      r0,[r1,#0]  ; g_ptADCCallBack
00002a  4903              LDR      r1,|L29.56|
00002c  6088              STR      r0,[r1,#8]  ; g_pu32UserData
00002e  6048              STR      r0,[r1,#4]  ; g_pu32UserData
000030  6008              STR      r0,[r1,#0]  ; g_pu32UserData
;;;709    
;;;710    	return;
;;;711    }
000032  4770              BX       lr
;;;712    
                          ENDP

                  |L29.52|
                          DCD      ||.data||
                  |L29.56|
                          DCD      ||.bss||

                          AREA ||i.DrvADC_SetADCChannel||, CODE, READONLY, ALIGN=2

                  DrvADC_SetADCChannel PROC
;;;107    /*---------------------------------------------------------------------------------------------------------*/
;;;108    void DrvADC_SetADCChannel(uint32_t u32ChannelSelBitwise)
000000  4904              LDR      r1,|L30.20|
;;;109    {     
;;;110    	ADC->CHER &= ~0x3FFFF;
000002  68ca              LDR      r2,[r1,#0xc]
000004  0c92              LSRS     r2,r2,#18
000006  0492              LSLS     r2,r2,#18
000008  60ca              STR      r2,[r1,#0xc]
;;;111    	ADC->CHER |= u32ChannelSelBitwise;     
00000a  68ca              LDR      r2,[r1,#0xc]
00000c  4302              ORRS     r2,r2,r0
00000e  60ca              STR      r2,[r1,#0xc]
;;;112    }
000010  4770              BX       lr
;;;113    
                          ENDP

000012  0000              DCW      0x0000
                  |L30.20|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_SetADCClkSrc||, CODE, READONLY, ALIGN=2

                  DrvADC_SetADCClkSrc PROC
;;;160    /*---------------------------------------------------------------------------------------------------------*/
;;;161    void DrvADC_SetADCClkSrc(E_ADC_CLK_SRC ClockSrc)
000000  4a04              LDR      r2,|L31.20|
;;;162    {
;;;163    
;;;164     	CLK->CLKSEL1_BITS.ADC_S = ClockSrc; /* ADC clock source */
000002  6951              LDR      r1,[r2,#0x14]
000004  230c              MOVS     r3,#0xc
000006  0780              LSLS     r0,r0,#30
000008  4399              BICS     r1,r1,r3
00000a  0f00              LSRS     r0,r0,#28
00000c  4301              ORRS     r1,r1,r0
00000e  6151              STR      r1,[r2,#0x14]
;;;165    }
000010  4770              BX       lr
;;;166    
                          ENDP

000012  0000              DCW      0x0000
                  |L31.20|
                          DCD      0x50000200

                          AREA ||i.DrvADC_SetADCDivisor||, CODE, READONLY, ALIGN=2

                  DrvADC_SetADCDivisor PROC
;;;179    /*---------------------------------------------------------------------------------------------------------*/
;;;180    void DrvADC_SetADCDivisor(uint8_t u8AdcDivisor)
000000  4a04              LDR      r2,|L32.20|
;;;181    {
;;;182    
;;;183     	CLK->CLKDIV0_BITS.ADC_N = u8AdcDivisor;
000002  69d1              LDR      r1,[r2,#0x1c]
000004  23ff              MOVS     r3,#0xff
000006  041b              LSLS     r3,r3,#16
000008  4399              BICS     r1,r1,r3
00000a  0400              LSLS     r0,r0,#16
00000c  4301              ORRS     r1,r1,r0
00000e  61d1              STR      r1,[r2,#0x1c]
;;;184    }
000010  4770              BX       lr
;;;185    
                          ENDP

000012  0000              DCW      0x0000
                  |L32.20|
                          DCD      0x50000200

                          AREA ||i.DrvADC_SetADCInputMode||, CODE, READONLY, ALIGN=2

                  DrvADC_SetADCInputMode PROC
;;;125    /*---------------------------------------------------------------------------------------------------------*/
;;;126    void DrvADC_SetADCInputMode(E_ADC_INPUT_MODE InputMode)
000000  4a04              LDR      r2,|L33.20|
;;;127    {
;;;128            ADC->CR_BITS.DIFF = InputMode;
000002  6891              LDR      r1,[r2,#8]
000004  1513              ASRS     r3,r2,#20
000006  07c0              LSLS     r0,r0,#31
000008  4399              BICS     r1,r1,r3
00000a  0d40              LSRS     r0,r0,#21
00000c  4301              ORRS     r1,r1,r0
00000e  6091              STR      r1,[r2,#8]
;;;129    }
000010  4770              BX       lr
;;;130    
                          ENDP

000012  0000              DCW      0x0000
                  |L33.20|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_SetADCOperationMode||, CODE, READONLY, ALIGN=2

                  DrvADC_SetADCOperationMode PROC
;;;143    /*---------------------------------------------------------------------------------------------------------*/
;;;144    void DrvADC_SetADCOperationMode(E_ADC_OPERATION_MODE OpMode)
000000  4a04              LDR      r2,|L34.20|
;;;145    {
;;;146    	ADC->CR_BITS.ADMD = OpMode; 
000002  6891              LDR      r1,[r2,#8]
000004  230c              MOVS     r3,#0xc
000006  0780              LSLS     r0,r0,#30
000008  4399              BICS     r1,r1,r3
00000a  0f00              LSRS     r0,r0,#28
00000c  4301              ORRS     r1,r1,r0
00000e  6091              STR      r1,[r2,#8]
;;;147    }
000010  4770              BX       lr
;;;148    
                          ENDP

000012  0000              DCW      0x0000
                  |L34.20|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_SetCalWord||, CODE, READONLY, ALIGN=2

                  DrvADC_SetCalWord PROC
;;;803      */
;;;804    void DrvADC_SetCalWord(uint8_t data)
000000  4901              LDR      r1,|L35.8|
;;;805    {
;;;806    
;;;807    	assert_param(data < 0x80);
;;;808    
;;;809    	ADC->CALWORD = data;
000002  62c8              STR      r0,[r1,#0x2c]
;;;810    
;;;811    }
000004  4770              BX       lr
;;;812    
                          ENDP

000006  0000              DCW      0x0000
                  |L35.8|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_SetPDMode||, CODE, READONLY, ALIGN=2

                  DrvADC_SetPDMode PROC
;;;833      */
;;;834    void DrvADC_SetPDMode(E_ADC_PD pd, uint8_t recal)
000000  b510              PUSH     {r4,lr}
;;;835    {
;;;836    	ADC->PWRCTL_BITS.PDMOD = pd;
000002  4a08              LDR      r2,|L36.36|
000004  6a53              LDR      r3,[r2,#0x24]
000006  240c              MOVS     r4,#0xc
000008  0780              LSLS     r0,r0,#30
00000a  43a3              BICS     r3,r3,r4
00000c  0f00              LSRS     r0,r0,#28
00000e  4303              ORRS     r3,r3,r0
000010  6253              STR      r3,[r2,#0x24]
;;;837    	ADC->PWRCTL_BITS.PUPCALEN = recal;
000012  6a50              LDR      r0,[r2,#0x24]
000014  2302              MOVS     r3,#2
000016  07c9              LSLS     r1,r1,#31
000018  4398              BICS     r0,r0,r3
00001a  0f89              LSRS     r1,r1,#30
00001c  4308              ORRS     r0,r0,r1
00001e  6250              STR      r0,[r2,#0x24]
;;;838    
;;;839    	return;
;;;840    
;;;841    }
000020  bd10              POP      {r4,pc}
;;;842    
                          ENDP

000022  0000              DCW      0x0000
                  |L36.36|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_SetResolution||, CODE, READONLY, ALIGN=2

                  DrvADC_SetResolution PROC
;;;847      */
;;;848    void DrvADC_SetResolution(E_ADC_RES res)
000000  4a04              LDR      r2,|L37.20|
;;;849    {
;;;850    	ADC->CR_BITS.RESSEL = res;
000002  6891              LDR      r1,[r2,#8]
000004  2303              MOVS     r3,#3
000006  049b              LSLS     r3,r3,#18
000008  0780              LSLS     r0,r0,#30
00000a  4399              BICS     r1,r1,r3
00000c  0b00              LSRS     r0,r0,#12
00000e  4301              ORRS     r1,r1,r0
000010  6091              STR      r1,[r2,#8]
;;;851    
;;;852    }
000012  4770              BX       lr
;;;853    
                          ENDP

                  |L37.20|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_SetSampleTime||, CODE, READONLY, ALIGN=2

                  DrvADC_SetSampleTime PROC
;;;860      */
;;;861    void DrvADC_SetSampleTime(uint8_t ch, E_ADC_SMPL_TIME time)
000000  b510              PUSH     {r4,lr}
;;;862    {
;;;863    	
;;;864    	assert_param(ch < ADC_CH_NUM);	
;;;865    
;;;866    	if(ch< 8) {
;;;867    		ADC->SMPLCNT0 &= ~(0xF << (4 * ch));
000002  4b12              LDR      r3,|L38.76|
000004  240f              MOVS     r4,#0xf
000006  0082              LSLS     r2,r0,#2
000008  2808              CMP      r0,#8                 ;866
00000a  d208              BCS      |L38.30|
00000c  6b18              LDR      r0,[r3,#0x30]
00000e  4094              LSLS     r4,r4,r2
000010  43a0              BICS     r0,r0,r4
000012  6318              STR      r0,[r3,#0x30]
;;;868    		ADC->SMPLCNT0 |= (time << (4 * ch));
000014  6b18              LDR      r0,[r3,#0x30]
000016  4091              LSLS     r1,r1,r2
000018  4308              ORRS     r0,r0,r1
00001a  6318              STR      r0,[r3,#0x30]
;;;869    	} else if(ch < 12) {
;;;870    		ADC->SMPLCNT1 &= ~(0xF << (4 * (ch - 8)));
;;;871    		ADC->SMPLCNT1 |= (time << (4 * (ch - 8)));
;;;872    	} else if(ch < ADC_CH_NUM) {
;;;873    		ADC->SMPLCNT1_BITS.INTCH = time;
;;;874    	} 
;;;875    
;;;876    }
00001c  bd10              POP      {r4,pc}
                  |L38.30|
00001e  280c              CMP      r0,#0xc               ;869
000020  d209              BCS      |L38.54|
000022  3a20              SUBS     r2,r2,#0x20           ;870
000024  6b58              LDR      r0,[r3,#0x34]         ;870
000026  4094              LSLS     r4,r4,r2              ;870
000028  43a0              BICS     r0,r0,r4              ;870
00002a  6358              STR      r0,[r3,#0x34]         ;870
00002c  6b58              LDR      r0,[r3,#0x34]         ;871
00002e  4091              LSLS     r1,r1,r2              ;871
000030  4301              ORRS     r1,r1,r0              ;871
000032  6359              STR      r1,[r3,#0x34]         ;871
                  |L38.52|
000034  bd10              POP      {r4,pc}
                  |L38.54|
000036  2812              CMP      r0,#0x12              ;872
000038  d2fc              BCS      |L38.52|
00003a  6b58              LDR      r0,[r3,#0x34]         ;873
00003c  220f              MOVS     r2,#0xf               ;873
00003e  0412              LSLS     r2,r2,#16             ;873
000040  0709              LSLS     r1,r1,#28             ;873
000042  4390              BICS     r0,r0,r2              ;873
000044  0b09              LSRS     r1,r1,#12             ;873
000046  4308              ORRS     r0,r0,r1              ;873
000048  6358              STR      r0,[r3,#0x34]         ;873
00004a  bd10              POP      {r4,pc}
;;;877    
                          ENDP

                  |L38.76|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_StartCal||, CODE, READONLY, ALIGN=2

                  DrvADC_StartCal PROC
;;;772      */
;;;773    int8_t DrvADC_StartCal(void)
000000  4906              LDR      r1,|L39.28|
;;;774    {
;;;775    	if(ADC->CALCTL_BITS.CALDONE != 1)
000002  6a88              LDR      r0,[r1,#0x28]
000004  0742              LSLS     r2,r0,#29
;;;776    		return(-1);
000006  4806              LDR      r0,|L39.32|
000008  d507              BPL      |L39.26|
;;;777    	if(ADC->CALCTL_BITS.CALEN == 0)
00000a  6a8a              LDR      r2,[r1,#0x28]
00000c  07d2              LSLS     r2,r2,#31
00000e  d004              BEQ      |L39.26|
;;;778    		return(-1);
;;;779    
;;;780    	ADC->CALCTL_BITS.CALSTART = 1;
000010  6a88              LDR      r0,[r1,#0x28]
000012  2202              MOVS     r2,#2
000014  4310              ORRS     r0,r0,r2
000016  6288              STR      r0,[r1,#0x28]
;;;781    	return(0);
000018  2000              MOVS     r0,#0
                  |L39.26|
;;;782    }
00001a  4770              BX       lr
;;;783    
                          ENDP

                  |L39.28|
                          DCD      0x400e0040
                  |L39.32|
                          DCD      0xffffffff

                          AREA ||i.DrvADC_StartConvert||, CODE, READONLY, ALIGN=2

                  DrvADC_StartConvert PROC
;;;435    /*---------------------------------------------------------------------------------------------------------*/
;;;436    void DrvADC_StartConvert(void)
000000  4803              LDR      r0,|L40.16|
;;;437    {
;;;438    	ADC->CR_BITS.ADST = 1;
000002  6881              LDR      r1,[r0,#8]
000004  2201              MOVS     r2,#1
000006  02d2              LSLS     r2,r2,#11
000008  4311              ORRS     r1,r1,r2
00000a  6081              STR      r1,[r0,#8]
;;;439    }
00000c  4770              BX       lr
;;;440    
                          ENDP

00000e  0000              DCW      0x0000
                  |L40.16|
                          DCD      0x400e0040

                          AREA ||i.DrvADC_StopConvert||, CODE, READONLY, ALIGN=2

                  DrvADC_StopConvert PROC
;;;452    /*---------------------------------------------------------------------------------------------------------*/
;;;453    void DrvADC_StopConvert(void)
000000  4803              LDR      r0,|L41.16|
;;;454    {
;;;455    	ADC->CR_BITS.ADST = 0;
000002  6881              LDR      r1,[r0,#8]
000004  2201              MOVS     r2,#1
000006  02d2              LSLS     r2,r2,#11
000008  4391              BICS     r1,r1,r2
00000a  6081              STR      r1,[r0,#8]
;;;456    }
00000c  4770              BX       lr
;;;457    
                          ENDP

00000e  0000              DCW      0x0000
                  |L41.16|
                          DCD      0x400e0040

                          AREA ||.bss||, DATA, NOINIT, ALIGN=2

                  g_pu32UserData
                          %        12

                          AREA ||.data||, DATA, ALIGN=2

                  g_ptADCCallBack
                          DCD      0x00000000
                  g_ptADCMP0CallBack
                          DCD      0x00000000
                  g_ptADCMP1CallBack
                          DCD      0x00000000
