; generated by ARM C/C++ Compiler, 4.1 [Build 894]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\obj\drvfmc.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\drvfmc.d --cpu=Cortex-M0 --apcs=interwork -I..\inc -I..\drv -I..\bsp -I..\bsp\Cmsis -I..\bsp\Driver -I..\bsp\system -I..\lib -I..\lib\libtk -IC:\Keil\ARM\RV31\Inc -IC:\Keil\ARM\CMSIS\Include -D__LCDDISPLAY_BTL001_H --omf_browse=.\obj\drvfmc.crf ..\bsp\Driver\DrvFMC.c]
                          THUMB

                          AREA ||i.DrvFMC_BootSelect||, CODE, READONLY, ALIGN=2

                  DrvFMC_BootSelect PROC
;;;297    /*---------------------------------------------------------------------------------------------------------*/
;;;298    void DrvFMC_BootSelect(E_FMC_BOOTSELECT boot)
000000  2202              MOVS     r2,#2
;;;299    {
;;;300    	FMC->ISPCON_BITS.BS = (boot)? 1: 0;
000002  4904              LDR      r1,|L1.20|
000004  2800              CMP      r0,#0
000006  6808              LDR      r0,[r1,#0]
000008  d001              BEQ      |L1.14|
00000a  4310              ORRS     r0,r0,r2
00000c  e000              B        |L1.16|
                  |L1.14|
00000e  4390              BICS     r0,r0,r2
                  |L1.16|
000010  6008              STR      r0,[r1,#0]
;;;301    }
000012  4770              BX       lr
;;;302    
                          ENDP

                  |L1.20|
                          DCD      0x5000c000

                          AREA ||i.DrvFMC_DisableConfigUpdate||, CODE, READONLY, ALIGN=2

                  DrvFMC_DisableConfigUpdate PROC
;;;392    /*---------------------------------------------------------------------------------------------------------*/
;;;393    void DrvFMC_DisableConfigUpdate()
000000  4802              LDR      r0,|L2.12|
;;;394    {	
;;;395    	FMC->ISPCON_BITS.CFGUEN = 0;
000002  6801              LDR      r1,[r0,#0]
000004  2210              MOVS     r2,#0x10
000006  4391              BICS     r1,r1,r2
000008  6001              STR      r1,[r0,#0]
;;;396    }
00000a  4770              BX       lr
;;;397    
                          ENDP

                  |L2.12|
                          DCD      0x5000c000

                          AREA ||i.DrvFMC_DisableISP||, CODE, READONLY, ALIGN=2

                  DrvFMC_DisableISP PROC
;;;278    /*---------------------------------------------------------------------------------------------------------*/
;;;279    void DrvFMC_DisableISP(void)
000000  4805              LDR      r0,|L3.24|
;;;280    {
;;;281    	CLK->AHBCLK_BITS.ISP_EN = 0;
000002  6841              LDR      r1,[r0,#4]
000004  2204              MOVS     r2,#4
000006  4391              BICS     r1,r1,r2
000008  6041              STR      r1,[r0,#4]
;;;282    	FMC->ISPCON_BITS.ISPEN = 0;
00000a  4804              LDR      r0,|L3.28|
00000c  6801              LDR      r1,[r0,#0]
00000e  0849              LSRS     r1,r1,#1
000010  0049              LSLS     r1,r1,#1
000012  6001              STR      r1,[r0,#0]
;;;283    }
000014  4770              BX       lr
;;;284    
                          ENDP

000016  0000              DCW      0x0000
                  |L3.24|
                          DCD      0x50000200
                  |L3.28|
                          DCD      0x5000c000

                          AREA ||i.DrvFMC_DisableLDUpdate||, CODE, READONLY, ALIGN=2

                  DrvFMC_DisableLDUpdate PROC
;;;352    /*---------------------------------------------------------------------------------------------------------*/
;;;353    void DrvFMC_DisableLDUpdate(void)
000000  4802              LDR      r0,|L4.12|
;;;354    {	
;;;355    	FMC->ISPCON_BITS.LDUEN = 0;
000002  6801              LDR      r1,[r0,#0]
000004  2220              MOVS     r2,#0x20
000006  4391              BICS     r1,r1,r2
000008  6001              STR      r1,[r0,#0]
;;;356    }
00000a  4770              BX       lr
;;;357    
                          ENDP

                  |L4.12|
                          DCD      0x5000c000

                          AREA ||i.DrvFMC_EnableConfigUpdate||, CODE, READONLY, ALIGN=2

                  DrvFMC_EnableConfigUpdate PROC
;;;372    /*---------------------------------------------------------------------------------------------------------*/
;;;373    void DrvFMC_EnableConfigUpdate()
000000  4802              LDR      r0,|L5.12|
;;;374    {	
;;;375    	FMC->ISPCON_BITS.CFGUEN = 1;
000002  6801              LDR      r1,[r0,#0]
000004  2210              MOVS     r2,#0x10
000006  4311              ORRS     r1,r1,r2
000008  6001              STR      r1,[r0,#0]
;;;376    }
00000a  4770              BX       lr
;;;377    
                          ENDP

                  |L5.12|
                          DCD      0x5000c000

                          AREA ||i.DrvFMC_EnableISP||, CODE, READONLY, ALIGN=2

                  DrvFMC_EnableISP PROC
;;;259    /*---------------------------------------------------------------------------------------------------------*/
;;;260    void DrvFMC_EnableISP(void)
000000  4802              LDR      r0,|L6.12|
;;;261    {
;;;262    	FMC->ISPCON_BITS.ISPEN = 1;
000002  6801              LDR      r1,[r0,#0]
000004  2201              MOVS     r2,#1
000006  4311              ORRS     r1,r1,r2
000008  6001              STR      r1,[r0,#0]
;;;263    }
00000a  4770              BX       lr
;;;264    
                          ENDP

                  |L6.12|
                          DCD      0x5000c000

                          AREA ||i.DrvFMC_EnableLDUpdate||, CODE, READONLY, ALIGN=2

                  DrvFMC_EnableLDUpdate PROC
;;;334    /*---------------------------------------------------------------------------------------------------------*/
;;;335    void DrvFMC_EnableLDUpdate(void)
000000  4802              LDR      r0,|L7.12|
;;;336    {	
;;;337    	FMC->ISPCON_BITS.LDUEN = 1;
000002  6801              LDR      r1,[r0,#0]
000004  2220              MOVS     r2,#0x20
000006  4311              ORRS     r1,r1,r2
000008  6001              STR      r1,[r0,#0]
;;;338    }
00000a  4770              BX       lr
;;;339    
                          ENDP

                  |L7.12|
                          DCD      0x5000c000

                          AREA ||i.DrvFMC_Erase||, CODE, READONLY, ALIGN=2

                  DrvFMC_Erase PROC
;;;90     /*---------------------------------------------------------------------------------------------------------*/
;;;91     int32_t DrvFMC_Erase(uint32_t u32addr)
000000  490a              LDR      r1,|L8.44|
;;;92     {
;;;93     	FMC->ISPCMD = 0x22;
000002  2222              MOVS     r2,#0x22
000004  60ca              STR      r2,[r1,#0xc]
;;;94         FMC->ISPADR	= u32addr;
000006  6048              STR      r0,[r1,#4]
;;;95     	FMC->ISPTRG_BITS.ISPGO = 1;	
000008  6908              LDR      r0,[r1,#0x10]
00000a  2201              MOVS     r2,#1
00000c  4310              ORRS     r0,r0,r2
00000e  6108              STR      r0,[r1,#0x10]
                  |L8.16|
;;;96     
;;;97     	while (FMC->ISPTRG_BITS.ISPGO) ;
000010  6908              LDR      r0,[r1,#0x10]
000012  07c0              LSLS     r0,r0,#31
000014  d1fc              BNE      |L8.16|
;;;98     
;;;99     	if (FMC->ISPCON_BITS.ISPFF == 1)
000016  6808              LDR      r0,[r1,#0]
000018  0640              LSLS     r0,r0,#25
00001a  d505              BPL      |L8.40|
;;;100    	{
;;;101    		FMC->ISPCON_BITS.ISPFF = 1;
00001c  6808              LDR      r0,[r1,#0]
00001e  2240              MOVS     r2,#0x40
000020  4310              ORRS     r0,r0,r2
000022  6008              STR      r0,[r1,#0]
;;;102    		return E_DRVFMC_ERR_ISP_FAIL;
000024  4802              LDR      r0,|L8.48|
;;;103    	}
;;;104    	
;;;105    	return 0;
;;;106    }
000026  4770              BX       lr
                  |L8.40|
000028  2000              MOVS     r0,#0                 ;105
00002a  4770              BX       lr
;;;107    
                          ENDP

                  |L8.44|
                          DCD      0x5000c000
                  |L8.48|
                          DCD      0xffff0010

                          AREA ||i.DrvFMC_GetBootSelect||, CODE, READONLY, ALIGN=2

                  DrvFMC_GetBootSelect PROC
;;;316    /*---------------------------------------------------------------------------------------------------------*/
;;;317    E_FMC_BOOTSELECT DrvFMC_GetBootSelect(void)
000000  4802              LDR      r0,|L9.12|
;;;318    {
;;;319    	return (E_FMC_BOOTSELECT)FMC->ISPCON_BITS.BS;
000002  6800              LDR      r0,[r0,#0]
000004  0780              LSLS     r0,r0,#30
000006  0fc0              LSRS     r0,r0,#31
;;;320    }
000008  4770              BX       lr
;;;321    
                          ENDP

00000a  0000              DCW      0x0000
                  |L9.12|
                          DCD      0x5000c000

                          AREA ||i.DrvFMC_GetVersion||, CODE, READONLY, ALIGN=2

                  DrvFMC_GetVersion PROC
;;;454    /*---------------------------------------------------------------------------------------------------------*/
;;;455    uint32_t DrvFMC_GetVersion(void)
000000  4800              LDR      r0,|L10.4|
;;;456    {
;;;457    	return DRVFMC_VERSION_NUM;
;;;458    }
000002  4770              BX       lr
;;;459    
                          ENDP

                  |L10.4|
                          DCD      0x00010001

                          AREA ||i.DrvFMC_Read||, CODE, READONLY, ALIGN=2

                  DrvFMC_Read PROC
;;;57     /*---------------------------------------------------------------------------------------------------------*/
;;;58     int32_t DrvFMC_Read(uint32_t u32addr, uint32_t * u32data)
000000  4a0c              LDR      r2,|L11.52|
;;;59     { 
;;;60     	FMC->ISPCMD = 0x00;
000002  2300              MOVS     r3,#0
000004  60d3              STR      r3,[r2,#0xc]
;;;61         FMC->ISPADR	= u32addr;
000006  6050              STR      r0,[r2,#4]
;;;62     	FMC->ISPDAT	= 0;
000008  6093              STR      r3,[r2,#8]
;;;63     	FMC->ISPTRG_BITS.ISPGO = 1;    
00000a  6910              LDR      r0,[r2,#0x10]
00000c  2301              MOVS     r3,#1
00000e  4318              ORRS     r0,r0,r3
000010  6110              STR      r0,[r2,#0x10]
                  |L11.18|
;;;64     
;;;65     	while (FMC->ISPTRG_BITS.ISPGO) ;
000012  6910              LDR      r0,[r2,#0x10]
000014  07c0              LSLS     r0,r0,#31
000016  d1fc              BNE      |L11.18|
;;;66     	
;;;67     	if (FMC->ISPCON_BITS.ISPFF == 1)
000018  6810              LDR      r0,[r2,#0]
00001a  0640              LSLS     r0,r0,#25
00001c  d505              BPL      |L11.42|
;;;68     	{
;;;69     		FMC->ISPCON_BITS.ISPFF = 1;
00001e  6810              LDR      r0,[r2,#0]
000020  2140              MOVS     r1,#0x40
000022  4308              ORRS     r0,r0,r1
000024  6010              STR      r0,[r2,#0]
;;;70     		return E_DRVFMC_ERR_ISP_FAIL;
000026  4804              LDR      r0,|L11.56|
;;;71     	}
;;;72     	
;;;73     	*u32data = FMC->ISPDAT;
;;;74     	return 0;
;;;75     }
000028  4770              BX       lr
                  |L11.42|
00002a  6890              LDR      r0,[r2,#8]            ;73
00002c  6008              STR      r0,[r1,#0]            ;74
00002e  2000              MOVS     r0,#0                 ;74
000030  4770              BX       lr
;;;76     
                          ENDP

000032  0000              DCW      0x0000
                  |L11.52|
                          DCD      0x5000c000
                  |L11.56|
                          DCD      0xffff0010

                          AREA ||i.DrvFMC_ReadCID||, CODE, READONLY, ALIGN=2

                  DrvFMC_ReadCID PROC
;;;153    /*---------------------------------------------------------------------------------------------------------*/
;;;154    int32_t DrvFMC_ReadCID(uint32_t * u32data)
000000  4907              LDR      r1,|L12.32|
;;;155    {
;;;156    	FMC->ISPCMD = 0x0B;
000002  220b              MOVS     r2,#0xb
000004  60ca              STR      r2,[r1,#0xc]
;;;157    	FMC->ISPADR	= 0;
000006  2200              MOVS     r2,#0
000008  604a              STR      r2,[r1,#4]
;;;158        FMC->ISPTRG_BITS.ISPGO = 1;
00000a  690a              LDR      r2,[r1,#0x10]
00000c  2301              MOVS     r3,#1
00000e  431a              ORRS     r2,r2,r3
000010  610a              STR      r2,[r1,#0x10]
                  |L12.18|
;;;159    
;;;160    	while (FMC->ISPTRG_BITS.ISPGO) ;
000012  690a              LDR      r2,[r1,#0x10]
000014  07d2              LSLS     r2,r2,#31
000016  d1fc              BNE      |L12.18|
;;;161        
;;;162    	*u32data = FMC->ISPDAT; 
000018  6889              LDR      r1,[r1,#8]
;;;163        return 0;
00001a  6001              STR      r1,[r0,#0]
00001c  2000              MOVS     r0,#0
;;;164    }
00001e  4770              BX       lr
;;;165    
                          ENDP

                  |L12.32|
                          DCD      0x5000c000

                          AREA ||i.DrvFMC_ReadDID||, CODE, READONLY, ALIGN=2

                  DrvFMC_ReadDID PROC
;;;179    /*---------------------------------------------------------------------------------------------------------*/
;;;180    int32_t DrvFMC_ReadDID(uint32_t * u32data)
000000  4907              LDR      r1,|L13.32|
;;;181    {
;;;182    	FMC->ISPCMD = 0x0C;
000002  220c              MOVS     r2,#0xc
000004  60ca              STR      r2,[r1,#0xc]
;;;183    	FMC->ISPADR	= 0;
000006  2200              MOVS     r2,#0
000008  604a              STR      r2,[r1,#4]
;;;184        FMC->ISPTRG_BITS.ISPGO = 1;
00000a  690a              LDR      r2,[r1,#0x10]
00000c  2301              MOVS     r3,#1
00000e  431a              ORRS     r2,r2,r3
000010  610a              STR      r2,[r1,#0x10]
                  |L13.18|
;;;185        
;;;186    	while (FMC->ISPTRG_BITS.ISPGO) ;
000012  690a              LDR      r2,[r1,#0x10]
000014  07d2              LSLS     r2,r2,#31
000016  d1fc              BNE      |L13.18|
;;;187        
;;;188    	*u32data = FMC->ISPDAT; 
000018  6889              LDR      r1,[r1,#8]
;;;189        return 0;
00001a  6001              STR      r1,[r0,#0]
00001c  2000              MOVS     r0,#0
;;;190    }
00001e  4770              BX       lr
;;;191    
                          ENDP

                  |L13.32|
                          DCD      0x5000c000

                          AREA ||i.DrvFMC_ReadDataFlashBaseAddr||, CODE, READONLY, ALIGN=2

                  DrvFMC_ReadDataFlashBaseAddr PROC
;;;411    /*---------------------------------------------------------------------------------------------------------*/
;;;412    uint32_t DrvFMC_ReadDataFlashBaseAddr(void)
000000  4801              LDR      r0,|L14.8|
;;;413    {	
;;;414    	return FMC->DFBADR;
000002  6940              LDR      r0,[r0,#0x14]
;;;415    }
000004  4770              BX       lr
;;;416    
                          ENDP

000006  0000              DCW      0x0000
                  |L14.8|
                          DCD      0x5000c000

                          AREA ||i.DrvFMC_ReadPID||, CODE, READONLY, ALIGN=2

                  DrvFMC_ReadPID PROC
;;;205    /*---------------------------------------------------------------------------------------------------------*/
;;;206    int32_t DrvFMC_ReadPID(uint32_t * u32data)
000000  4907              LDR      r1,|L15.32|
;;;207    {
;;;208    	FMC->ISPCMD = 0x0C;
000002  220c              MOVS     r2,#0xc
000004  60ca              STR      r2,[r1,#0xc]
;;;209    	FMC->ISPADR	= 0x04;
000006  2204              MOVS     r2,#4
000008  604a              STR      r2,[r1,#4]
;;;210        FMC->ISPTRG_BITS.ISPGO = 1;
00000a  690a              LDR      r2,[r1,#0x10]
00000c  2301              MOVS     r3,#1
00000e  431a              ORRS     r2,r2,r3
000010  610a              STR      r2,[r1,#0x10]
                  |L15.18|
;;;211    
;;;212    	while (FMC->ISPTRG_BITS.ISPGO) ;
000012  690a              LDR      r2,[r1,#0x10]
000014  07d2              LSLS     r2,r2,#31
000016  d1fc              BNE      |L15.18|
;;;213        
;;;214    	*u32data = FMC->ISPDAT; 
000018  6889              LDR      r1,[r1,#8]
;;;215        return 0;
00001a  6001              STR      r1,[r0,#0]
00001c  2000              MOVS     r0,#0
;;;216    }
00001e  4770              BX       lr
;;;217    
                          ENDP

                  |L15.32|
                          DCD      0x5000c000

                          AREA ||i.DrvFMC_ReadUID||, CODE, READONLY, ALIGN=2

                  DrvFMC_ReadUID PROC
;;;233    /*---------------------------------------------------------------------------------------------------------*/
;;;234    int32_t DrvFMC_ReadUID(int index, uint32_t * u32data)
000000  4a07              LDR      r2,|L16.32|
;;;235    {
;;;236    	FMC->ISPCMD = 0x04;
000002  2304              MOVS     r3,#4
000004  60d3              STR      r3,[r2,#0xc]
;;;237    	FMC->ISPADR	= 0x04 * index;
000006  0080              LSLS     r0,r0,#2
000008  6050              STR      r0,[r2,#4]
;;;238        FMC->ISPTRG_BITS.ISPGO = 1;
00000a  6910              LDR      r0,[r2,#0x10]
00000c  2301              MOVS     r3,#1
00000e  4318              ORRS     r0,r0,r3
000010  6110              STR      r0,[r2,#0x10]
                  |L16.18|
;;;239    
;;;240    	while (FMC->ISPTRG_BITS.ISPGO) ;
000012  6910              LDR      r0,[r2,#0x10]
000014  07c0              LSLS     r0,r0,#31
000016  d1fc              BNE      |L16.18|
;;;241        
;;;242    	*u32data = FMC->ISPDAT; 
000018  6890              LDR      r0,[r2,#8]
;;;243        return 0;
00001a  6008              STR      r0,[r1,#0]
00001c  2000              MOVS     r0,#0
;;;244    }
00001e  4770              BX       lr
;;;245    
                          ENDP

                  |L16.32|
                          DCD      0x5000c000

                          AREA ||i.DrvFMC_SetVectorPage||, CODE, READONLY, ALIGN=2

                  DrvFMC_SetVectorPage PROC
;;;122    /*---------------------------------------------------------------------------------------------------------*/
;;;123    int32_t DrvFMC_SetVectorPage(uint32_t u32addr)
000000  490a              LDR      r1,|L17.44|
;;;124    {
;;;125    	FMC->ISPCMD = 0x2E;
000002  222e              MOVS     r2,#0x2e
000004  60ca              STR      r2,[r1,#0xc]
;;;126        FMC->ISPADR	= u32addr;
000006  6048              STR      r0,[r1,#4]
;;;127    	FMC->ISPTRG_BITS.ISPGO = 1;	
000008  6908              LDR      r0,[r1,#0x10]
00000a  2201              MOVS     r2,#1
00000c  4310              ORRS     r0,r0,r2
00000e  6108              STR      r0,[r1,#0x10]
                  |L17.16|
;;;128    
;;;129    	while (FMC->ISPTRG_BITS.ISPGO) ;
000010  6908              LDR      r0,[r1,#0x10]
000012  07c0              LSLS     r0,r0,#31
000014  d1fc              BNE      |L17.16|
;;;130    
;;;131    	if (FMC->ISPCON_BITS.ISPFF == 1)
000016  6808              LDR      r0,[r1,#0]
000018  0640              LSLS     r0,r0,#25
00001a  d505              BPL      |L17.40|
;;;132    	{
;;;133    		FMC->ISPCON_BITS.ISPFF = 1;
00001c  6808              LDR      r0,[r1,#0]
00001e  2240              MOVS     r2,#0x40
000020  4310              ORRS     r0,r0,r2
000022  6008              STR      r0,[r1,#0]
;;;134    		return E_DRVFMC_ERR_ISP_FAIL;
000024  4802              LDR      r0,|L17.48|
;;;135    	}
;;;136    	return 0;
;;;137    }
000026  4770              BX       lr
                  |L17.40|
000028  2000              MOVS     r0,#0                 ;136
00002a  4770              BX       lr
;;;138    
                          ENDP

                  |L17.44|
                          DCD      0x5000c000
                  |L17.48|
                          DCD      0xffff0010

                          AREA ||i.DrvFMC_Write||, CODE, READONLY, ALIGN=2

                  DrvFMC_Write PROC
;;;24     /*---------------------------------------------------------------------------------------------------------*/
;;;25     int32_t DrvFMC_Write(uint32_t u32addr, uint32_t u32data)
000000  4a0b              LDR      r2,|L18.48|
;;;26     {
;;;27     	FMC->ISPCMD = 0x21;
000002  2321              MOVS     r3,#0x21
000004  60d3              STR      r3,[r2,#0xc]
;;;28         FMC->ISPADR	= u32addr;
000006  6050              STR      r0,[r2,#4]
;;;29     	FMC->ISPDAT	= u32data;
000008  6091              STR      r1,[r2,#8]
;;;30     	FMC->ISPTRG_BITS.ISPGO = 1;	
00000a  6910              LDR      r0,[r2,#0x10]
00000c  2101              MOVS     r1,#1
00000e  4308              ORRS     r0,r0,r1
000010  6110              STR      r0,[r2,#0x10]
                  |L18.18|
;;;31     	
;;;32     	while (FMC->ISPTRG_BITS.ISPGO) ;
000012  6910              LDR      r0,[r2,#0x10]
000014  07c0              LSLS     r0,r0,#31
000016  d1fc              BNE      |L18.18|
;;;33     
;;;34     	if (FMC->ISPCON_BITS.ISPFF == 1)
000018  6810              LDR      r0,[r2,#0]
00001a  0640              LSLS     r0,r0,#25
00001c  d505              BPL      |L18.42|
;;;35     	{
;;;36     		FMC->ISPCON_BITS.ISPFF = 1;
00001e  6810              LDR      r0,[r2,#0]
000020  2140              MOVS     r1,#0x40
000022  4308              ORRS     r0,r0,r1
000024  6010              STR      r0,[r2,#0]
;;;37     		return E_DRVFMC_ERR_ISP_FAIL;
000026  4803              LDR      r0,|L18.52|
;;;38     	}
;;;39     	
;;;40     	return 0;
;;;41     }
000028  4770              BX       lr
                  |L18.42|
00002a  2000              MOVS     r0,#0                 ;40
00002c  4770              BX       lr
;;;42     
                          ENDP

00002e  0000              DCW      0x0000
                  |L18.48|
                          DCD      0x5000c000
                  |L18.52|
                          DCD      0xffff0010

                          AREA ||i.DrvFMC_WriteConfig||, CODE, READONLY, ALIGN=2

                  DrvFMC_WriteConfig PROC
;;;431    /*---------------------------------------------------------------------------------------------------------*/
;;;432    int32_t DrvFMC_WriteConfig(uint32_t u32data0, uint32_t u32data1)
000000  b570              PUSH     {r4-r6,lr}
;;;433    {		
;;;434    	if (DrvFMC_Erase(CONFIG0))
000002  2303              MOVS     r3,#3
000004  4606              MOV      r6,r0                 ;433
000006  051b              LSLS     r3,r3,#20
000008  460d              MOV      r5,r1                 ;433
00000a  4618              MOV      r0,r3
00000c  f7fffffe          BL       DrvFMC_Erase
;;;435    		return E_DRVFMC_ERR_ISP_FAIL;
000010  4c07              LDR      r4,|L19.48|
000012  2800              CMP      r0,#0                 ;434
000014  d105              BNE      |L19.34|
;;;436    	
;;;437    	if (DrvFMC_Write(CONFIG0, u32data0))
000016  4631              MOV      r1,r6
000018  4618              MOV      r0,r3
00001a  f7fffffe          BL       DrvFMC_Write
00001e  2800              CMP      r0,#0
000020  d001              BEQ      |L19.38|
                  |L19.34|
;;;438    		return E_DRVFMC_ERR_ISP_FAIL;
000022  4620              MOV      r0,r4
;;;439    
;;;440    	return DrvFMC_Write(CONFIG1, u32data1);
;;;441    }
000024  bd70              POP      {r4-r6,pc}
                  |L19.38|
000026  4629              MOV      r1,r5                 ;440
000028  4802              LDR      r0,|L19.52|
00002a  f7fffffe          BL       DrvFMC_Write
00002e  bd70              POP      {r4-r6,pc}
;;;442    
                          ENDP

                  |L19.48|
                          DCD      0xffff0010
                  |L19.52|
                          DCD      0x00300004
