; generated by ARM C/C++ Compiler, 4.1 [Build 894]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\obj\drvtimer.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\drvtimer.d --cpu=Cortex-M0 --apcs=interwork -I..\inc -I..\drv -I..\bsp -I..\bsp\Cmsis -I..\bsp\Driver -I..\bsp\system -I..\lib -I..\lib\libtk -IC:\Keil\ARM\RV31\Inc -IC:\Keil\ARM\CMSIS\Include -D__LCDDISPLAY_BTL001_H --omf_browse=.\obj\drvtimer.crf ..\bsp\Driver\DrvTIMER.c]
                          THUMB

                          AREA ||i.CalTimerInitValue||, CODE, READONLY, ALIGN=2

                  CalTimerInitValue PROC
;;;150    /*---------------------------------------------------------------------------------------------------------*/
;;;151    static uint32_t CalTimerInitValue(uint32_t u32ClockValue, uint32_t u32TicksPerSec)
000000  b5f3              PUSH     {r0,r1,r4-r7,lr}
;;;152    {
000002  b081              SUB      sp,sp,#4
;;;153        uint32_t u32PreScale;
;;;154        uint32_t u32TCMPRValue;
;;;155    
;;;156        if ((u32ClockValue < 2) || (u32TicksPerSec == 0))
;;;157            return (uint32_t)-1;
000004  2700              MOVS     r7,#0
000006  9801              LDR      r0,[sp,#4]            ;156
000008  43ff              MVNS     r7,r7
00000a  460d              MOV      r5,r1                 ;152
00000c  2802              CMP      r0,#2                 ;156
00000e  d312              BCC      |L1.54|
000010  2d00              CMP      r5,#0                 ;156
000012  d010              BEQ      |L1.54|
;;;158    
;;;159        for (u32PreScale=1; u32PreScale<256; u32PreScale++)
;;;160        {
;;;161            u32TCMPRValue = u32ClockValue / (u32TicksPerSec * u32PreScale);
;;;162    
;;;163            /* The TCMPR value must > 1 */
;;;164            if ((u32TCMPRValue > 1) && (u32TCMPRValue < 0x1000000))
000014  4e09              LDR      r6,|L1.60|
000016  2401              MOVS     r4,#1                 ;159
                  |L1.24|
000018  4629              MOV      r1,r5                 ;161
00001a  4361              MULS     r1,r4,r1              ;161
00001c  9801              LDR      r0,[sp,#4]            ;161
00001e  f7fffffe          BL       __aeabi_uidivmod
000022  1e81              SUBS     r1,r0,#2
000024  42b1              CMP      r1,r6
000026  d203              BCS      |L1.48|
;;;165                return (((u32PreScale-1) << 24) | u32TCMPRValue);
000028  1e64              SUBS     r4,r4,#1
00002a  0621              LSLS     r1,r4,#24
00002c  4308              ORRS     r0,r0,r1
;;;166        }
;;;167        
;;;168        return (uint32_t)-1;
;;;169    }
00002e  bdfe              POP      {r1-r7,pc}
                  |L1.48|
000030  1c64              ADDS     r4,r4,#1              ;159
000032  2cff              CMP      r4,#0xff              ;159
000034  d9f0              BLS      |L1.24|
                  |L1.54|
000036  4638              MOV      r0,r7                 ;168
000038  bdfe              POP      {r1-r7,pc}
;;;170    
                          ENDP

00003a  0000              DCW      0x0000
                  |L1.60|
                          DCD      0x00fffffe

                          AREA ||i.DrvTIMER_ClearIntFlag||, CODE, READONLY, ALIGN=2

                  DrvTIMER_ClearIntFlag PROC
;;;978    /*---------------------------------------------------------------------------------------------------------*/
;;;979    int32_t DrvTIMER_ClearIntFlag(E_TIMER_CHANNEL ch)
000000  2103              MOVS     r1,#3
;;;980    {
;;;981        assert_param(ch <= E_TMR3);    
;;;982    	if (ch == E_TMR0 )
000002  2800              CMP      r0,#0
000004  d006              BEQ      |L2.20|
;;;983            TIMER0->ISR = 3;
;;;984        else if(ch == E_TMR1 )                                   
000006  2801              CMP      r0,#1
000008  d006              BEQ      |L2.24|
;;;985            TIMER1->ISR = 3;
;;;986        else if(ch == E_TMR2 )
00000a  2802              CMP      r0,#2
00000c  d006              BEQ      |L2.28|
;;;987            TIMER2->ISR = 3;
;;;988        else if(ch == E_TMR3 )
00000e  2803              CMP      r0,#3
000010  d006              BEQ      |L2.32|
000012  e007              B        |L2.36|
                  |L2.20|
000014  4804              LDR      r0,|L2.40|
000016  e004              B        |L2.34|
                  |L2.24|
000018  4804              LDR      r0,|L2.44|
00001a  e002              B        |L2.34|
                  |L2.28|
00001c  4804              LDR      r0,|L2.48|
00001e  e000              B        |L2.34|
                  |L2.32|
;;;989            TIMER3->ISR = 3;
000020  4804              LDR      r0,|L2.52|
                  |L2.34|
000022  6101              STR      r1,[r0,#0x10]
                  |L2.36|
;;;990    
;;;991    
;;;992        return E_SUCCESS;
000024  2000              MOVS     r0,#0
;;;993    }
000026  4770              BX       lr
;;;994    
                          ENDP

                  |L2.40|
                          DCD      0x40010000
                  |L2.44|
                          DCD      0x40010100
                  |L2.48|
                          DCD      0x40110000
                  |L2.52|
                          DCD      0x40110100

                          AREA ||i.DrvTIMER_ClearTimerEvent||, CODE, READONLY, ALIGN=2

                  DrvTIMER_ClearTimerEvent PROC
;;;802    /*---------------------------------------------------------------------------------------------------------*/
;;;803    void DrvTIMER_ClearTimerEvent(E_TIMER_CHANNEL ch, uint32_t uTimerEventNo)
000000  2214              MOVS     r2,#0x14
;;;804    {
;;;805        switch (ch)
;;;806        {
;;;807            case E_TMR0:
;;;808            {
;;;809                tTime0Event[uTimerEventNo].active = FALSE;
000002  4351              MULS     r1,r2,r1
000004  2300              MOVS     r3,#0                 ;804
;;;810                uTime0EventCount--;
000006  4a1a              LDR      r2,|L3.112|
000008  2800              CMP      r0,#0                 ;805
00000a  d00f              BEQ      |L3.44|
00000c  2801              CMP      r0,#1                 ;805
00000e  d018              BEQ      |L3.66|
000010  2802              CMP      r0,#2                 ;805
000012  d021              BEQ      |L3.88|
000014  2803              CMP      r0,#3                 ;805
000016  d108              BNE      |L3.42|
;;;811                if (uTime0EventCount == 0)
;;;812                {
;;;813                    bIsSetTime0Event = FALSE;
;;;814                }
;;;815                break;
;;;816            }
;;;817    
;;;818            case E_TMR1:
;;;819            {
;;;820                tTime1Event[uTimerEventNo].active = FALSE;
;;;821                uTime1EventCount--;
;;;822                if (uTime1EventCount == 0)
;;;823                {
;;;824                    bIsSetTime1Event = FALSE;
;;;825                }
;;;826                break;
;;;827            }
;;;828    
;;;829            case E_TMR2:
;;;830            {
;;;831                tTime2Event[uTimerEventNo].active = FALSE;
;;;832                uTime2EventCount--;
;;;833                if (uTime2EventCount == 0)
;;;834                {
;;;835                    bIsSetTime2Event = FALSE;
;;;836                }
;;;837                break;
;;;838            }
;;;839    
;;;840            case E_TMR3:
;;;841            {
;;;842                tTime3Event[uTimerEventNo].active = FALSE;
000018  4816              LDR      r0,|L3.116|
00001a  5043              STR      r3,[r0,r1]
;;;843                uTime3EventCount--;
00001c  6bd0              LDR      r0,[r2,#0x3c]  ; uTime3EventCount
00001e  1e40              SUBS     r0,r0,#1
000020  63d0              STR      r0,[r2,#0x3c]  ; uTime3EventCount
;;;844                if (uTime3EventCount == 0)
000022  6bd0              LDR      r0,[r2,#0x3c]  ; uTime3EventCount
000024  2800              CMP      r0,#0
000026  d100              BNE      |L3.42|
;;;845                {
;;;846                    bIsSetTime3Event = FALSE;
000028  61d3              STR      r3,[r2,#0x1c]  ; bIsSetTime3Event
                  |L3.42|
;;;847                }
;;;848                break;
;;;849            }
;;;850    
;;;851            default:
;;;852            {
;;;853                break;
;;;854            }
;;;855        }
;;;856    }
00002a  4770              BX       lr
                  |L3.44|
00002c  4811              LDR      r0,|L3.116|
00002e  383c              SUBS     r0,r0,#0x3c           ;809
000030  5043              STR      r3,[r0,r1]            ;809
000032  6b10              LDR      r0,[r2,#0x30]         ;810  ; uTime0EventCount
000034  1e40              SUBS     r0,r0,#1              ;810
000036  6310              STR      r0,[r2,#0x30]         ;810  ; uTime0EventCount
000038  6b10              LDR      r0,[r2,#0x30]         ;811  ; uTime0EventCount
00003a  2800              CMP      r0,#0                 ;811
00003c  d1f5              BNE      |L3.42|
00003e  6113              STR      r3,[r2,#0x10]         ;813  ; bIsSetTime0Event
                  |L3.64|
000040  4770              BX       lr
                  |L3.66|
000042  480c              LDR      r0,|L3.116|
000044  3828              SUBS     r0,r0,#0x28           ;820
000046  5043              STR      r3,[r0,r1]            ;820
000048  6b50              LDR      r0,[r2,#0x34]         ;821  ; uTime1EventCount
00004a  1e40              SUBS     r0,r0,#1              ;821
00004c  6350              STR      r0,[r2,#0x34]         ;821  ; uTime1EventCount
00004e  6b50              LDR      r0,[r2,#0x34]         ;822  ; uTime1EventCount
000050  2800              CMP      r0,#0                 ;822
000052  d1f5              BNE      |L3.64|
000054  6153              STR      r3,[r2,#0x14]         ;824  ; bIsSetTime1Event
                  |L3.86|
000056  4770              BX       lr
                  |L3.88|
000058  4806              LDR      r0,|L3.116|
00005a  3814              SUBS     r0,r0,#0x14           ;831
00005c  5043              STR      r3,[r0,r1]            ;831
00005e  6b90              LDR      r0,[r2,#0x38]         ;832  ; uTime2EventCount
000060  1e40              SUBS     r0,r0,#1              ;832
000062  6390              STR      r0,[r2,#0x38]         ;832  ; uTime2EventCount
000064  6b90              LDR      r0,[r2,#0x38]         ;833  ; uTime2EventCount
000066  2800              CMP      r0,#0                 ;833
000068  d1f5              BNE      |L3.86|
00006a  6193              STR      r3,[r2,#0x18]         ;835  ; bIsSetTime2Event
00006c  4770              BX       lr
;;;857    
                          ENDP

00006e  0000              DCW      0x0000
                  |L3.112|
                          DCD      ||.data||
                  |L3.116|
                          DCD      ||.bss||+0x3c

                          AREA ||i.DrvTIMER_Close||, CODE, READONLY, ALIGN=2

                  DrvTIMER_Close PROC
;;;621    /*---------------------------------------------------------------------------------------------------------*/
;;;622    int32_t DrvTIMER_Close(E_TIMER_CHANNEL ch)
000000  b510              PUSH     {r4,lr}
;;;623    {
000002  2100              MOVS     r1,#0
;;;624        assert_param(ch <= E_TMR3);
;;;625        switch (ch)
;;;626        {
;;;627            case E_TMR0:
;;;628            {
;;;629                bIsTimer0Used       = FALSE;
000004  4a0e              LDR      r2,|L4.64|
000006  4604              MOV      r4,r0                 ;623
000008  2800              CMP      r0,#0                 ;625
00000a  d006              BEQ      |L4.26|
00000c  2c01              CMP      r4,#1                 ;625
00000e  d007              BEQ      |L4.32|
000010  2c02              CMP      r4,#2                 ;625
000012  d008              BEQ      |L4.38|
000014  2c03              CMP      r4,#3                 ;625
000016  d10b              BNE      |L4.48|
000018  e008              B        |L4.44|
                  |L4.26|
00001a  6011              STR      r1,[r2,#0]  ; bIsTimer0Used
;;;630                bIsSetTime0Event    = FALSE;
00001c  6111              STR      r1,[r2,#0x10]  ; bIsSetTime0Event
;;;631                break;
00001e  e007              B        |L4.48|
                  |L4.32|
;;;632            }
;;;633    
;;;634            case E_TMR1:
;;;635            {
;;;636                bIsTimer1Used       = FALSE;
000020  6051              STR      r1,[r2,#4]  ; bIsTimer1Used
;;;637                bIsSetTime1Event    = FALSE;
000022  6151              STR      r1,[r2,#0x14]  ; bIsSetTime1Event
;;;638                break;
000024  e004              B        |L4.48|
                  |L4.38|
;;;639            }
;;;640    
;;;641            case E_TMR2:
;;;642            {
;;;643                bIsTimer2Used       = FALSE;
000026  6091              STR      r1,[r2,#8]  ; bIsTimer2Used
;;;644                bIsSetTime2Event    = FALSE;
000028  6191              STR      r1,[r2,#0x18]  ; bIsSetTime2Event
;;;645                break;
00002a  e001              B        |L4.48|
                  |L4.44|
;;;646            }
;;;647    
;;;648            case E_TMR3:
;;;649            {
;;;650                bIsTimer3Used       = FALSE;
00002c  60d1              STR      r1,[r2,#0xc]  ; bIsTimer3Used
;;;651                bIsSetTime3Event    = FALSE;
00002e  61d1              STR      r1,[r2,#0x1c]  ; bIsSetTime3Event
                  |L4.48|
;;;652                break;
;;;653            }
;;;654    
;;;655        }
;;;656        
;;;657        DrvTIMER_DisableInt(ch, E_TIMER_BOTH_INT);
000030  2103              MOVS     r1,#3
000032  f7fffffe          BL       DrvTIMER_DisableInt
;;;658        DrvTIMER_Reset(ch);
000036  4620              MOV      r0,r4
000038  f7fffffe          BL       DrvTIMER_Reset
;;;659        return E_SUCCESS;
00003c  2000              MOVS     r0,#0
;;;660    }
00003e  bd10              POP      {r4,pc}
;;;661    
                          ENDP

                  |L4.64|
                          DCD      ||.data||

                          AREA ||i.DrvTIMER_ConfigTriggerEvent||, CODE, READONLY, ALIGN=2

                  DrvTIMER_ConfigTriggerEvent PROC
;;;1489     */
;;;1490   int32_t DrvTIMER_ConfigTriggerEvent(E_TIMER_CHANNEL ch, uint8_t event, E_TIMER_TRIGGER_SRC src)
000000  b570              PUSH     {r4-r6,lr}
;;;1491   {
000002  460c              MOV      r4,r1
000004  4615              MOV      r5,r2
;;;1492       TIMER_TypeDef *base = _getBase(ch);
000006  f7fffffe          BL       _getBase
;;;1493       
;;;1494       assert_param(base != NULL);         
;;;1495       assert_param(event < (TIMER_TRIGGER_PDMA | TIMER_TRIGGER_DAC | TIMER_TRIGGER_ADC|TIMER_TRIGGER_TK));
;;;1496   	assert_param(!((ch != E_TMR0) && (src & TIMER_TRIGGER_TK)));
;;;1497   
;;;1498       base->CTL_BITS.CAP_TRG_EN = src;
00000a  6801              LDR      r1,[r0,#0]
00000c  2201              MOVS     r2,#1
00000e  02d2              LSLS     r2,r2,#11
000010  4391              BICS     r1,r1,r2
000012  07ea              LSLS     r2,r5,#31
000014  0d12              LSRS     r2,r2,#20
000016  4311              ORRS     r1,r1,r2
000018  6001              STR      r1,[r0,#0]
;;;1499       base->CTL_BITS.PDMA_TEEN = (event & TIMER_TRIGGER_PDMA) ? 1 : 0;
00001a  6801              LDR      r1,[r0,#0]
00001c  2201              MOVS     r2,#1
00001e  0292              LSLS     r2,r2,#10
000020  4391              BICS     r1,r1,r2
000022  07e2              LSLS     r2,r4,#31
000024  0d52              LSRS     r2,r2,#21
000026  4311              ORRS     r1,r1,r2
000028  6001              STR      r1,[r0,#0]
;;;1500       base->CTL_BITS.DAC_TEEN = (event & TIMER_TRIGGER_DAC) ? 1 : 0;
00002a  0761              LSLS     r1,r4,#29
00002c  4a0c              LDR      r2,|L5.96|
00002e  6801              LDR      r1,[r0,#0]
000030  d501              BPL      |L5.54|
000032  4311              ORRS     r1,r1,r2
000034  e000              B        |L5.56|
                  |L5.54|
000036  4391              BICS     r1,r1,r2
                  |L5.56|
000038  6001              STR      r1,[r0,#0]
;;;1501       base->CTL_BITS.ADC_TEEN = (event & TIMER_TRIGGER_ADC) ? 1 : 0;  
00003a  07a1              LSLS     r1,r4,#30
00003c  4a09              LDR      r2,|L5.100|
00003e  6801              LDR      r1,[r0,#0]
000040  d501              BPL      |L5.70|
000042  4311              ORRS     r1,r1,r2
000044  e000              B        |L5.72|
                  |L5.70|
000046  4391              BICS     r1,r1,r2
                  |L5.72|
000048  6001              STR      r1,[r0,#0]
;;;1502   	base->CTL_BITS.TK_WAKE_EN = (event & TIMER_TRIGGER_TK) ? 1 : 0;
00004a  0721              LSLS     r1,r4,#28
00004c  4a06              LDR      r2,|L5.104|
00004e  6801              LDR      r1,[r0,#0]
000050  d501              BPL      |L5.86|
000052  4311              ORRS     r1,r1,r2
000054  e000              B        |L5.88|
                  |L5.86|
000056  4391              BICS     r1,r1,r2
                  |L5.88|
000058  6001              STR      r1,[r0,#0]
;;;1503   	    
;;;1504       return(0);
00005a  2000              MOVS     r0,#0
;;;1505   }
00005c  bd70              POP      {r4-r6,pc}
;;;1506   
                          ENDP

00005e  0000              DCW      0x0000
                  |L5.96|
                          DCD      0x00000200
                  |L5.100|
                          DCD      0x00000100
                  |L5.104|
                          DCD      0x00008000

                          AREA ||i.DrvTIMER_Delay||, CODE, READONLY, ALIGN=1

                  DrvTIMER_Delay PROC
;;;1136   /*---------------------------------------------------------------------------------------------------------*/
;;;1137   void DrvTIMER_Delay(E_TIMER_CHANNEL ch, uint32_t uIntTicks)
000000  b510              PUSH     {r4,lr}
;;;1138   {
000002  460b              MOV      r3,r1
000004  4604              MOV      r4,r0
;;;1139       uint32_t volatile btime;
;;;1140   
;;;1141       btime = DrvTIMER_GetIntTicks(ch);
000006  f7fffffe          BL       DrvTIMER_GetIntTicks
00000a  4602              MOV      r2,r0
                  |L6.12|
;;;1142       
;;;1143       while (1)
;;;1144       {
;;;1145           if ((DrvTIMER_GetIntTicks(ch) - btime) > uIntTicks)
00000c  4620              MOV      r0,r4
00000e  f7fffffe          BL       DrvTIMER_GetIntTicks
000012  1a80              SUBS     r0,r0,r2
000014  4298              CMP      r0,r3
000016  d9f9              BLS      |L6.12|
;;;1146           {
;;;1147               break;
;;;1148           }
;;;1149       }
;;;1150   }
000018  bd10              POP      {r4,pc}
;;;1151   
                          ENDP


                          AREA ||i.DrvTIMER_DisableCaptureMode||, CODE, READONLY, ALIGN=1

                  DrvTIMER_DisableCaptureMode PROC
;;;1368     */
;;;1369   int32_t DrvTIMER_DisableCaptureMode(E_TIMER_CHANNEL ch)  
000000  b510              PUSH     {r4,lr}
;;;1370   {
;;;1371       TIMER_TypeDef *base = _getBase(ch); 
000002  f7fffffe          BL       _getBase
;;;1372       assert_param(base != NULL);       
;;;1373       base->CTL_BITS.TCAP_EN = 0;
000006  6801              LDR      r1,[r0,#0]
000008  2201              MOVS     r2,#1
00000a  0412              LSLS     r2,r2,#16
00000c  4391              BICS     r1,r1,r2
00000e  6001              STR      r1,[r0,#0]
;;;1374       base->CTL_BITS.TCAP_DEB_EN = 0;
000010  6801              LDR      r1,[r0,#0]
000012  0192              LSLS     r2,r2,#6
000014  4391              BICS     r1,r1,r2
000016  6001              STR      r1,[r0,#0]
;;;1375       
;;;1376       return(0);
000018  2000              MOVS     r0,#0
;;;1377   }
00001a  bd10              POP      {r4,pc}
;;;1378   
                          ENDP


                          AREA ||i.DrvTIMER_DisableCounterResetMode||, CODE, READONLY, ALIGN=1

                  DrvTIMER_DisableCounterResetMode PROC
;;;1327     */
;;;1328   int32_t DrvTIMER_DisableCounterResetMode(E_TIMER_CHANNEL ch)
000000  b510              PUSH     {r4,lr}
;;;1329   {
;;;1330       TIMER_TypeDef *base = _getBase(ch); 
000002  f7fffffe          BL       _getBase
;;;1331       assert_param(base != NULL);  
;;;1332       base->CTL_BITS.TCAP_EN = 0;
000006  6801              LDR      r1,[r0,#0]
000008  2201              MOVS     r2,#1
00000a  0412              LSLS     r2,r2,#16
00000c  4391              BICS     r1,r1,r2
00000e  6001              STR      r1,[r0,#0]
;;;1333       base->CTL_BITS.TCAP_DEB_EN = 0;
000010  6801              LDR      r1,[r0,#0]
000012  0192              LSLS     r2,r2,#6
000014  4391              BICS     r1,r1,r2
000016  6001              STR      r1,[r0,#0]
;;;1334       return(0);
000018  2000              MOVS     r0,#0
;;;1335   
;;;1336   }
00001a  bd10              POP      {r4,pc}
;;;1337   
                          ENDP


                          AREA ||i.DrvTIMER_DisableExternalEventMode||, CODE, READONLY, ALIGN=1

                  DrvTIMER_DisableExternalEventMode PROC
;;;1406     */
;;;1407   int32_t DrvTIMER_DisableExternalEventMode(E_TIMER_CHANNEL ch)
000000  b510              PUSH     {r4,lr}
;;;1408   {
;;;1409       TIMER_TypeDef *base = _getBase(ch); 
000002  f7fffffe          BL       _getBase
;;;1410       assert_param(base != NULL); 
;;;1411   
;;;1412       base->CTL_BITS.EVENT_EN = 0;
000006  6801              LDR      r1,[r0,#0]
000008  2201              MOVS     r2,#1
00000a  0312              LSLS     r2,r2,#12
00000c  4391              BICS     r1,r1,r2
00000e  6001              STR      r1,[r0,#0]
;;;1413       base->CTL_BITS.EVNT_DEB_EN = 0;
000010  6801              LDR      r1,[r0,#0]
000012  0092              LSLS     r2,r2,#2
000014  4391              BICS     r1,r1,r2
000016  6001              STR      r1,[r0,#0]
;;;1414       
;;;1415       return(0);
000018  2000              MOVS     r0,#0
;;;1416   
;;;1417   }
00001a  bd10              POP      {r4,pc}
;;;1418   
                          ENDP


                          AREA ||i.DrvTIMER_DisableInt||, CODE, READONLY, ALIGN=1

                  DrvTIMER_DisableInt PROC
;;;908    /*---------------------------------------------------------------------------------------------------------*/
;;;909    int32_t DrvTIMER_DisableInt(E_TIMER_CHANNEL ch, E_TIMER_INT eInterrupt)
000000  b570              PUSH     {r4-r6,lr}
;;;910    {
000002  460d              MOV      r5,r1
000004  4604              MOV      r4,r0
;;;911        TIMER_TypeDef *base = _getBase(ch); 
000006  f7fffffe          BL       _getBase
;;;912            
;;;913        base->IER &= ~eInterrupt;
00000a  68c1              LDR      r1,[r0,#0xc]
00000c  43a9              BICS     r1,r1,r5
00000e  60c1              STR      r1,[r0,#0xc]
;;;914    
;;;915        if(base->IER == 0) {
000010  68c0              LDR      r0,[r0,#0xc]
000012  2800              CMP      r0,#0
000014  d111              BNE      |L10.58|
;;;916        
;;;917            switch(ch)
000016  2c00              CMP      r4,#0
000018  d006              BEQ      |L10.40|
00001a  2c01              CMP      r4,#1
00001c  d006              BEQ      |L10.44|
00001e  2c02              CMP      r4,#2
000020  d006              BEQ      |L10.48|
000022  2c03              CMP      r4,#3
000024  d109              BNE      |L10.58|
000026  e005              B        |L10.52|
                  |L10.40|
;;;918            {
;;;919                case E_TMR0:
;;;920                    NVIC_DisableIRQ(TMR0_IRQn);
000028  2008              MOVS     r0,#8
;;;921                    break;  
00002a  e004              B        |L10.54|
                  |L10.44|
;;;922                case E_TMR1:
;;;923                    NVIC_DisableIRQ(TMR1_IRQn);
00002c  2009              MOVS     r0,#9
;;;924                    break;  
00002e  e002              B        |L10.54|
                  |L10.48|
;;;925                case E_TMR2:
;;;926                    NVIC_DisableIRQ(TMR2_IRQn);
000030  200a              MOVS     r0,#0xa
;;;927                    break;  
000032  e000              B        |L10.54|
                  |L10.52|
;;;928                case E_TMR3:
;;;929                    NVIC_DisableIRQ(TMR3_IRQn);
000034  200b              MOVS     r0,#0xb
                  |L10.54|
000036  f7fffffe          BL       NVIC_DisableIRQ
                  |L10.58|
;;;930                    break;              
;;;931            }           
;;;932        }   
;;;933        return(0);
00003a  2000              MOVS     r0,#0
;;;934    }
00003c  bd70              POP      {r4-r6,pc}
;;;935    
                          ENDP


                          AREA ||i.DrvTIMER_DisableInterTimerTriggerMode||, CODE, READONLY, ALIGN=1

                  DrvTIMER_DisableInterTimerTriggerMode PROC
;;;1285     */
;;;1286   int32_t DrvTIMER_DisableInterTimerTriggerMode(E_TIMER_CHANNEL ch)
000000  b510              PUSH     {r4,lr}
;;;1287   {
;;;1288       TIMER_TypeDef *base;
;;;1289       E_TIMER_CHANNEL _ch = (E_TIMER_CHANNEL)(((uint32_t)ch >> 1) << 1); // now _ch is ether 0 or 2
000002  0840              LSRS     r0,r0,#1
000004  0040              LSLS     r0,r0,#1
;;;1290   
;;;1291           
;;;1292       base = _getBase(_ch);
000006  f7fffffe          BL       _getBase
;;;1293       assert_param(base != NULL); 
;;;1294   
;;;1295       base->CTL_BITS.INTR_TRG_EN = 0;
00000a  6801              LDR      r1,[r0,#0]
00000c  2201              MOVS     r2,#1
00000e  0612              LSLS     r2,r2,#24
000010  4391              BICS     r1,r1,r2
000012  6001              STR      r1,[r0,#0]
;;;1296       return(0);
000014  2000              MOVS     r0,#0
;;;1297   }
000016  bd10              POP      {r4,pc}
;;;1298   
                          ENDP


                          AREA ||i.DrvTIMER_DisableWakeUp||, CODE, READONLY, ALIGN=1

                  DrvTIMER_DisableWakeUp PROC
;;;1440     */
;;;1441   int32_t DrvTIMER_DisableWakeUp(E_TIMER_CHANNEL ch)
000000  b510              PUSH     {r4,lr}
;;;1442   {
;;;1443       TIMER_TypeDef *base = _getBase(ch); 
000002  f7fffffe          BL       _getBase
;;;1444       assert_param(base != NULL);    
;;;1445       base->CTL_BITS.WAKE_EN = 0;
000006  6801              LDR      r1,[r0,#0]
000008  2204              MOVS     r2,#4
00000a  4391              BICS     r1,r1,r2
00000c  6001              STR      r1,[r0,#0]
;;;1446       return(0);
00000e  2000              MOVS     r0,#0
;;;1447   }
000010  bd10              POP      {r4,pc}
;;;1448   
                          ENDP


                          AREA ||i.DrvTIMER_EnableCaptureMode||, CODE, READONLY, ALIGN=1

                  DrvTIMER_EnableCaptureMode PROC
;;;1347     */
;;;1348   int32_t DrvTIMER_EnableCaptureMode(E_TIMER_CHANNEL ch, E_TIMER_CAP_MODE mode, E_TIMER_CAP_EDGE edge)
000000  b570              PUSH     {r4-r6,lr}
;;;1349   {
000002  460c              MOV      r4,r1
000004  4615              MOV      r5,r2
;;;1350       TIMER_TypeDef *base = _getBase(ch); 
000006  f7fffffe          BL       _getBase
;;;1351       assert_param(base != NULL);    
;;;1352   
;;;1353       base->CTL_BITS.TCAP_MODE = 0;
00000a  6801              LDR      r1,[r0,#0]
00000c  2201              MOVS     r2,#1
00000e  0452              LSLS     r2,r2,#17
000010  4391              BICS     r1,r1,r2
000012  6001              STR      r1,[r0,#0]
;;;1354       base->CTL_BITS.TCAP_EDGE = edge;
000014  6801              LDR      r1,[r0,#0]
000016  2203              MOVS     r2,#3
000018  0492              LSLS     r2,r2,#18
00001a  4391              BICS     r1,r1,r2
00001c  07aa              LSLS     r2,r5,#30
00001e  0b12              LSRS     r2,r2,#12
000020  4311              ORRS     r1,r1,r2
000022  6001              STR      r1,[r0,#0]
;;;1355       base->CTL_BITS.CAP_CNT_MOD = mode;
000024  6801              LDR      r1,[r0,#0]
000026  2201              MOVS     r2,#1
000028  0512              LSLS     r2,r2,#20
00002a  4391              BICS     r1,r1,r2
00002c  07e2              LSLS     r2,r4,#31
00002e  0ad2              LSRS     r2,r2,#11
000030  4311              ORRS     r1,r1,r2
000032  6001              STR      r1,[r0,#0]
;;;1356       base->CTL_BITS.TCAP_EN = 1;
000034  6801              LDR      r1,[r0,#0]
000036  2201              MOVS     r2,#1
000038  0412              LSLS     r2,r2,#16
00003a  4311              ORRS     r1,r1,r2
00003c  6001              STR      r1,[r0,#0]
;;;1357       base->CTL_BITS.TCAP_DEB_EN = 1;
00003e  6801              LDR      r1,[r0,#0]
000040  0192              LSLS     r2,r2,#6
000042  4311              ORRS     r1,r1,r2
000044  6001              STR      r1,[r0,#0]
;;;1358   
;;;1359       return(0);
000046  2000              MOVS     r0,#0
;;;1360   }
000048  bd70              POP      {r4-r6,pc}
;;;1361   
                          ENDP


                          AREA ||i.DrvTIMER_EnableCounterResetMode||, CODE, READONLY, ALIGN=1

                  DrvTIMER_EnableCounterResetMode PROC
;;;1307     */
;;;1308   int32_t DrvTIMER_EnableCounterResetMode(E_TIMER_CHANNEL ch, E_TIMER_CAP_EDGE edge)
000000  b510              PUSH     {r4,lr}
;;;1309   {
000002  460c              MOV      r4,r1
;;;1310       TIMER_TypeDef *base = _getBase(ch); 
000004  f7fffffe          BL       _getBase
;;;1311       assert_param(base != NULL); 
;;;1312       base->CTL_BITS.TCAP_MODE = 1;
000008  6801              LDR      r1,[r0,#0]
00000a  2201              MOVS     r2,#1
00000c  0452              LSLS     r2,r2,#17
00000e  4311              ORRS     r1,r1,r2
000010  6001              STR      r1,[r0,#0]
;;;1313       base->CTL_BITS.TCAP_EDGE = edge;
000012  6802              LDR      r2,[r0,#0]
000014  2103              MOVS     r1,#3
000016  0489              LSLS     r1,r1,#18
000018  438a              BICS     r2,r2,r1
00001a  07a1              LSLS     r1,r4,#30
00001c  0b09              LSRS     r1,r1,#12
00001e  430a              ORRS     r2,r2,r1
000020  6002              STR      r2,[r0,#0]
;;;1314       base->CTL_BITS.TCAP_EN = 1;
000022  6801              LDR      r1,[r0,#0]
000024  2201              MOVS     r2,#1
000026  0412              LSLS     r2,r2,#16
000028  4311              ORRS     r1,r1,r2
00002a  6001              STR      r1,[r0,#0]
;;;1315       base->CTL_BITS.TCAP_DEB_EN = 1;
00002c  6801              LDR      r1,[r0,#0]
00002e  0192              LSLS     r2,r2,#6
000030  4311              ORRS     r1,r1,r2
000032  6001              STR      r1,[r0,#0]
;;;1316   
;;;1317   
;;;1318       return(0);
000034  2000              MOVS     r0,#0
;;;1319   }
000036  bd10              POP      {r4,pc}
;;;1320   
                          ENDP


                          AREA ||i.DrvTIMER_EnableExternalEventMode||, CODE, READONLY, ALIGN=1

                  DrvTIMER_EnableExternalEventMode PROC
;;;1387     */
;;;1388   int32_t DrvTIMER_EnableExternalEventMode(E_TIMER_CHANNEL ch, E_TIMER_EVENT_EDGE edge)
000000  b510              PUSH     {r4,lr}
;;;1389   {
000002  460c              MOV      r4,r1
;;;1390       TIMER_TypeDef *base = _getBase(ch); 
000004  f7fffffe          BL       _getBase
;;;1391       assert_param(base != NULL); 
;;;1392           
;;;1393       base->CTL_BITS.EVENT_EDGE = edge;
000008  6802              LDR      r2,[r0,#0]
00000a  2101              MOVS     r1,#1
00000c  0349              LSLS     r1,r1,#13
00000e  438a              BICS     r2,r2,r1
000010  07e1              LSLS     r1,r4,#31
000012  0c89              LSRS     r1,r1,#18
000014  430a              ORRS     r2,r2,r1
000016  6002              STR      r2,[r0,#0]
;;;1394       base->CTL_BITS.EVENT_EN = 1;
000018  6801              LDR      r1,[r0,#0]
00001a  2201              MOVS     r2,#1
00001c  0312              LSLS     r2,r2,#12
00001e  4311              ORRS     r1,r1,r2
000020  6001              STR      r1,[r0,#0]
;;;1395       base->CTL_BITS.EVNT_DEB_EN = 1;
000022  6801              LDR      r1,[r0,#0]
000024  0092              LSLS     r2,r2,#2
000026  4311              ORRS     r1,r1,r2
000028  6001              STR      r1,[r0,#0]
;;;1396       
;;;1397       return(0);
00002a  2000              MOVS     r0,#0
;;;1398   }
00002c  bd10              POP      {r4,pc}
;;;1399   
                          ENDP


                          AREA ||i.DrvTIMER_EnableInt||, CODE, READONLY, ALIGN=1

                  DrvTIMER_EnableInt PROC
;;;869    /*---------------------------------------------------------------------------------------------------------*/
;;;870    int32_t DrvTIMER_EnableInt(E_TIMER_CHANNEL ch, E_TIMER_INT eInterrupt)
000000  b570              PUSH     {r4-r6,lr}
;;;871    {
000002  460d              MOV      r5,r1
000004  4604              MOV      r4,r0
;;;872        TIMER_TypeDef *base = _getBase(ch);
000006  f7fffffe          BL       _getBase
;;;873    
;;;874        base->ISR = eInterrupt;  // clear pending interrupt
00000a  6105              STR      r5,[r0,#0x10]
;;;875        base->IER |= eInterrupt;
00000c  68c1              LDR      r1,[r0,#0xc]
00000e  4329              ORRS     r1,r1,r5
000010  60c1              STR      r1,[r0,#0xc]
;;;876    
;;;877        switch(ch)
000012  2c00              CMP      r4,#0
000014  d006              BEQ      |L16.36|
000016  2c01              CMP      r4,#1
000018  d006              BEQ      |L16.40|
00001a  2c02              CMP      r4,#2
00001c  d009              BEQ      |L16.50|
00001e  2c03              CMP      r4,#3
000020  d105              BNE      |L16.46|
000022  e008              B        |L16.54|
                  |L16.36|
;;;878        {
;;;879            case E_TMR0:
;;;880                NVIC_EnableIRQ(TMR0_IRQn);
000024  2008              MOVS     r0,#8
;;;881                break;  
000026  e000              B        |L16.42|
                  |L16.40|
;;;882            case E_TMR1:
;;;883                NVIC_EnableIRQ(TMR1_IRQn);
000028  2009              MOVS     r0,#9
                  |L16.42|
00002a  f7fffffe          BL       NVIC_EnableIRQ
                  |L16.46|
;;;884                break;  
;;;885            case E_TMR2:
;;;886                NVIC_EnableIRQ(TMR2_IRQn);
;;;887                break;  
;;;888            case E_TMR3:
;;;889                NVIC_EnableIRQ(TMR3_IRQn);
;;;890                break;              
;;;891        
;;;892        }
;;;893    
;;;894        return(0);
00002e  2000              MOVS     r0,#0
;;;895    }
000030  bd70              POP      {r4-r6,pc}
                  |L16.50|
000032  200a              MOVS     r0,#0xa               ;886
000034  e7f9              B        |L16.42|
                  |L16.54|
000036  200b              MOVS     r0,#0xb               ;889
000038  e7f7              B        |L16.42|
;;;896    
                          ENDP


                          AREA ||i.DrvTIMER_EnableInterTimerTriggerMode||, CODE, READONLY, ALIGN=1

                  DrvTIMER_EnableInterTimerTriggerMode PROC
;;;1265     */
;;;1266   int32_t DrvTIMER_EnableInterTimerTriggerMode(E_TIMER_CHANNEL ch)
000000  b510              PUSH     {r4,lr}
;;;1267   {
;;;1268       TIMER_TypeDef *base;
;;;1269       E_TIMER_CHANNEL _ch = (E_TIMER_CHANNEL)(((uint32_t)ch >> 1) << 1); // now _ch is ether 0 or 2       
000002  0840              LSRS     r0,r0,#1
000004  0040              LSLS     r0,r0,#1
;;;1270           
;;;1271       base = _getBase(_ch);
000006  f7fffffe          BL       _getBase
;;;1272       assert_param(base != NULL); 
;;;1273   	    
;;;1274       base->CTL_BITS.INTR_TRG_EN = 1;
00000a  6801              LDR      r1,[r0,#0]
00000c  2201              MOVS     r2,#1
00000e  0612              LSLS     r2,r2,#24
000010  4311              ORRS     r1,r1,r2
000012  6001              STR      r1,[r0,#0]
;;;1275   
;;;1276       return(0);
000014  2000              MOVS     r0,#0
;;;1277   }
000016  bd10              POP      {r4,pc}
;;;1278   
                          ENDP


                          AREA ||i.DrvTIMER_EnableWakeUp||, CODE, READONLY, ALIGN=1

                  DrvTIMER_EnableWakeUp PROC
;;;1425     */
;;;1426   int32_t DrvTIMER_EnableWakeUp(E_TIMER_CHANNEL ch)
000000  b510              PUSH     {r4,lr}
;;;1427   {
;;;1428       TIMER_TypeDef *base = _getBase(ch); 
000002  f7fffffe          BL       _getBase
;;;1429       assert_param(base != NULL); 
;;;1430       base->CTL_BITS.WAKE_EN = 1;
000006  6801              LDR      r1,[r0,#0]
000008  2204              MOVS     r2,#4
00000a  4311              ORRS     r1,r1,r2
00000c  6001              STR      r1,[r0,#0]
;;;1431       return(0);
00000e  2000              MOVS     r0,#0
;;;1432   }
000010  bd10              POP      {r4,pc}
;;;1433   
                          ENDP


                          AREA ||i.DrvTIMER_GetCaptureData||, CODE, READONLY, ALIGN=1

                  DrvTIMER_GetCaptureData PROC
;;;1455     */
;;;1456   int32_t DrvTIMER_GetCaptureData(E_TIMER_CHANNEL ch)
000000  b510              PUSH     {r4,lr}
;;;1457   {
;;;1458       TIMER_TypeDef *base = _getBase(ch);
000002  f7fffffe          BL       _getBase
;;;1459       assert_param(base != NULL);     
;;;1460       return(base->TCAP);
000006  6980              LDR      r0,[r0,#0x18]
;;;1461   
;;;1462   }
000008  bd10              POP      {r4,pc}
;;;1463   
                          ENDP


                          AREA ||i.DrvTIMER_GetCounters||, CODE, READONLY, ALIGN=1

                  DrvTIMER_GetCounters PROC
;;;1183   /*---------------------------------------------------------------------------------------------------------*/
;;;1184   uint32_t DrvTIMER_GetCounters(E_TIMER_CHANNEL ch)
000000  b510              PUSH     {r4,lr}
;;;1185   {
;;;1186       TIMER_TypeDef *base = _getBase(ch);
000002  f7fffffe          BL       _getBase
;;;1187       return(base->DR);
000006  6940              LDR      r0,[r0,#0x14]
;;;1188   }
000008  bd10              POP      {r4,pc}
;;;1189   
                          ENDP


                          AREA ||i.DrvTIMER_GetIntFlag||, CODE, READONLY, ALIGN=2

                  DrvTIMER_GetIntFlag PROC
;;;947    /*---------------------------------------------------------------------------------------------------------*/
;;;948    int32_t DrvTIMER_GetIntFlag(E_TIMER_CHANNEL ch)
000000  4601              MOV      r1,r0
;;;949    {
;;;950        int32_t iIntStatus = 0;
000002  2000              MOVS     r0,#0
;;;951    
;;;952        assert_param(ch <= E_TMR3);
;;;953    
;;;954        if (ch == E_TMR0 )
000004  2900              CMP      r1,#0
000006  d007              BEQ      |L21.24|
;;;955            iIntStatus =  TIMER0->ISR;
;;;956        else if(ch == E_TMR1 )
000008  2901              CMP      r1,#1
00000a  d007              BEQ      |L21.28|
;;;957            iIntStatus =  TIMER1->ISR;
;;;958        else if(ch == E_TMR2 )
00000c  2902              CMP      r1,#2
00000e  d008              BEQ      |L21.34|
;;;959            iIntStatus =  TIMER2->ISR;
;;;960        else if(ch == E_TMR3 )
000010  2903              CMP      r1,#3
000012  d105              BNE      |L21.32|
;;;961            iIntStatus =  TIMER3->ISR;
000014  4804              LDR      r0,|L21.40|
000016  e002              B        |L21.30|
                  |L21.24|
000018  4804              LDR      r0,|L21.44|
00001a  e000              B        |L21.30|
                  |L21.28|
00001c  4804              LDR      r0,|L21.48|
                  |L21.30|
00001e  6900              LDR      r0,[r0,#0x10]         ;955
                  |L21.32|
;;;962    
;;;963    
;;;964        return iIntStatus;
;;;965    }
000020  4770              BX       lr
                  |L21.34|
000022  4804              LDR      r0,|L21.52|
000024  e7fb              B        |L21.30|
;;;966    
                          ENDP

000026  0000              DCW      0x0000
                  |L21.40|
                          DCD      0x40110100
                  |L21.44|
                          DCD      0x40010000
                  |L21.48|
                          DCD      0x40010100
                  |L21.52|
                          DCD      0x40110000

                          AREA ||i.DrvTIMER_GetIntTicks||, CODE, READONLY, ALIGN=2

                  DrvTIMER_GetIntTicks PROC
;;;1048   /*---------------------------------------------------------------------------------------------------------*/
;;;1049   uint32_t DrvTIMER_GetIntTicks(E_TIMER_CHANNEL ch)
000000  4909              LDR      r1,|L22.40|
;;;1050   {
;;;1051       assert_param(ch <= E_TMR3);
;;;1052       switch (ch)
000002  2800              CMP      r0,#0
000004  d007              BEQ      |L22.22|
000006  2801              CMP      r0,#1
000008  d007              BEQ      |L22.26|
00000a  2802              CMP      r0,#2
00000c  d007              BEQ      |L22.30|
00000e  2803              CMP      r0,#3
000010  d007              BEQ      |L22.34|
;;;1053       {
;;;1054           case E_TMR0:
;;;1055           {
;;;1056               return uTimer0Tick;  
;;;1057           }
;;;1058   
;;;1059           case E_TMR1:
;;;1060           {
;;;1061               return uTimer1Tick;
;;;1062           }   
;;;1063   
;;;1064           case E_TMR2:
;;;1065           {
;;;1066               return uTimer2Tick;
;;;1067           }
;;;1068   
;;;1069           case E_TMR3:
;;;1070           {
;;;1071               return uTimer3Tick;
;;;1072           }
;;;1073   
;;;1074       }
;;;1075   	return(0);
000012  2000              MOVS     r0,#0
;;;1076   }
000014  4770              BX       lr
                  |L22.22|
000016  6a08              LDR      r0,[r1,#0x20]         ;1056  ; uTimer0Tick
000018  4770              BX       lr
                  |L22.26|
00001a  6a48              LDR      r0,[r1,#0x24]         ;1061  ; uTimer1Tick
00001c  4770              BX       lr
                  |L22.30|
00001e  6a88              LDR      r0,[r1,#0x28]         ;1066  ; uTimer2Tick
000020  4770              BX       lr
                  |L22.34|
000022  6ac8              LDR      r0,[r1,#0x2c]         ;1071  ; uTimer3Tick
000024  4770              BX       lr
;;;1077   
                          ENDP

000026  0000              DCW      0x0000
                  |L22.40|
                          DCD      ||.data||

                          AREA ||i.DrvTIMER_GetVersion||, CODE, READONLY, ALIGN=1

                  DrvTIMER_GetVersion PROC
;;;1199   /*---------------------------------------------------------------------------------------------------------*/
;;;1200   uint32_t DrvTIMER_GetVersion(void)
000000  2001              MOVS     r0,#1
;;;1201   {
;;;1202       return DRVTIMER_VERSION_NUM;
000002  0400              LSLS     r0,r0,#16
;;;1203   }
000004  4770              BX       lr
;;;1204   
                          ENDP


                          AREA ||i.DrvTIMER_Init||, CODE, READONLY, ALIGN=1

                  DrvTIMER_Init PROC
;;;316    /*---------------------------------------------------------------------------------------------------------*/
;;;317    void DrvTIMER_Init(void)
000000  4770              BX       lr
;;;318    {
;;;319        return;
;;;320    }
;;;321    
                          ENDP


                          AREA ||i.DrvTIMER_IsActive||, CODE, READONLY, ALIGN=1

                  DrvTIMER_IsActive PROC
;;;1514     */
;;;1515   int32_t DrvTIMER_IsActive(E_TIMER_CHANNEL ch)
000000  b510              PUSH     {r4,lr}
;;;1516   {
;;;1517       TIMER_TypeDef *base = _getBase(ch);
000002  f7fffffe          BL       _getBase
;;;1518       assert_param(base != NULL);    
;;;1519       return(base->CTL_BITS.TMR_ACT);
000006  6800              LDR      r0,[r0,#0]
000008  0600              LSLS     r0,r0,#24
00000a  0fc0              LSRS     r0,r0,#31
;;;1520   }
00000c  bd10              POP      {r4,pc}
;;;1521   
                          ENDP


                          AREA ||i.DrvTIMER_IsWakeUpSource||, CODE, READONLY, ALIGN=1

                  DrvTIMER_IsWakeUpSource PROC
;;;1530     */
;;;1531   int32_t DrvTIMER_IsWakeUpSource(E_TIMER_CHANNEL ch)
000000  b510              PUSH     {r4,lr}
;;;1532   {
;;;1533       TIMER_TypeDef *base = _getBase(ch);
000002  f7fffffe          BL       _getBase
;;;1534       int8_t ret;
;;;1535       assert_param(base != NULL); 
;;;1536       ret = (base->ISR_BITS.TMR_WAKE_STS == 1) ? 1 : 0;   
000006  6901              LDR      r1,[r0,#0x10]
000008  06c9              LSLS     r1,r1,#27
00000a  0fc9              LSRS     r1,r1,#31
;;;1537       
;;;1538       if(ret)
00000c  d001              BEQ      |L26.18|
;;;1539           base->ISR = 0x10;
00000e  2210              MOVS     r2,#0x10
000010  6102              STR      r2,[r0,#0x10]
                  |L26.18|
;;;1540       
;;;1541       return(ret);
000012  4608              MOV      r0,r1
;;;1542   }
000014  bd10              POP      {r4,pc}
;;;1543   
                          ENDP


                          AREA ||i.DrvTIMER_Open||, CODE, READONLY, ALIGN=2

                  DrvTIMER_Open PROC
;;;338    /*---------------------------------------------------------------------------------------------------------*/
;;;339    int32_t DrvTIMER_Open(E_TIMER_CHANNEL ch, uint32_t uTicksPerSecond, E_TIMER_OPMODE op_mode)
000000  b5f8              PUSH     {r3-r7,lr}
;;;340    {
000002  460c              MOV      r4,r1
;;;341        uint32_t i;
;;;342        uint32_t uRegTcmpr;
;;;343    
;;;344    	assert_param(ch <= E_TMR3);
;;;345    
;;;346        switch (ch)
;;;347        {
;;;348            case E_TMR0:
;;;349            {
;;;350                if (bIsTimer0Used != FALSE)
;;;351                    return E_DRVTIMER_EIO;
;;;352                
;;;353                bIsTimer0Used = TRUE;
;;;354               
;;;355                CLK->APBCLK_BITS.TMR0_EN = 1;
;;;356                                                                  
;;;357                TIMER0->CTL = 0;                  /* disable timer */
;;;358                TIMER0->ISR = 0x13;                             /* write 1 to clear for safty */
;;;359                uTime0EventCount = 0;                               
;;;360                for (i=0; i<TIMER_EVENT_COUNT; i++)
;;;361                {
;;;362                    tTime0Event[i].active = FALSE;
;;;363                }
;;;364    
;;;365                uTimer0Tick = 0;            
;;;366                _sys_uTimer0TickPerSecond = uTicksPerSecond;
;;;367                        
;;;368                uRegTcmpr = CalTimerInitValue(GetTimerClock(E_TMR0), uTicksPerSecond); 
;;;369                if (uRegTcmpr > 0xFFFFFF)       
;;;370                {
;;;371                    return E_DRVTIMER_CLOCK_RATE;           
;;;372                }
;;;373    
;;;374                TIMER0->CMPR = (uRegTcmpr & 0xFFFFFF);  
;;;375                TIMER0->CTL_BITS.MODE_SEL = op_mode;        
000004  0791              LSLS     r1,r2,#30
000006  0e8d              LSRS     r5,r1,#26
000008  2701              MOVS     r7,#1                 ;340
00000a  4e49              LDR      r6,|L27.304|
00000c  2313              MOVS     r3,#0x13              ;358
00000e  4a49              LDR      r2,|L27.308|
000010  2100              MOVS     r1,#0                 ;340
000012  2800              CMP      r0,#0                 ;346
000014  d006              BEQ      |L27.36|
000016  2801              CMP      r0,#1                 ;346
000018  d02c              BEQ      |L27.116|
00001a  2802              CMP      r0,#2                 ;346
00001c  d04c              BEQ      |L27.184|
00001e  2803              CMP      r0,#3                 ;346
000020  d148              BNE      |L27.180|
000022  e061              B        |L27.232|
                  |L27.36|
000024  6810              LDR      r0,[r2,#0]            ;350  ; bIsTimer0Used
000026  2800              CMP      r0,#0                 ;350
000028  d161              BNE      |L27.238|
00002a  4842              LDR      r0,|L27.308|
00002c  6007              STR      r7,[r0,#0]            ;353  ; bIsTimer0Used
00002e  68b2              LDR      r2,[r6,#8]            ;355
000030  2704              MOVS     r7,#4                 ;355
000032  433a              ORRS     r2,r2,r7              ;355
000034  60b2              STR      r2,[r6,#8]            ;355
000036  4e40              LDR      r6,|L27.312|
000038  6031              STR      r1,[r6,#0]            ;357
00003a  6133              STR      r3,[r6,#0x10]         ;358
00003c  6301              STR      r1,[r0,#0x30]         ;359  ; uTime0EventCount
00003e  4a3f              LDR      r2,|L27.316|
000040  2000              MOVS     r0,#0                 ;360
                  |L27.66|
000042  2314              MOVS     r3,#0x14              ;362
000044  4343              MULS     r3,r0,r3              ;362
000046  50d1              STR      r1,[r2,r3]            ;362
000048  1c40              ADDS     r0,r0,#1              ;360
00004a  d0fa              BEQ      |L27.66|
00004c  4839              LDR      r0,|L27.308|
00004e  6201              STR      r1,[r0,#0x20]         ;365  ; uTimer0Tick
000050  6444              STR      r4,[r0,#0x44]         ;366  ; _sys_uTimer0TickPerSecond
000052  2000              MOVS     r0,#0                 ;368
000054  f7fffffe          BL       GetTimerClock
000058  4621              MOV      r1,r4                 ;368
00005a  f7fffffe          BL       CalTimerInitValue
00005e  4938              LDR      r1,|L27.320|
000060  4288              CMP      r0,r1                 ;369
000062  d862              BHI      |L27.298|
000064  4008              ANDS     r0,r0,r1              ;374
000066  60b0              STR      r0,[r6,#8]            ;374
000068  6830              LDR      r0,[r6,#0]
00006a  2130              MOVS     r1,#0x30
00006c  4388              BICS     r0,r0,r1
00006e  4328              ORRS     r0,r0,r5
000070  6030              STR      r0,[r6,#0]
;;;376                break;
000072  e01f              B        |L27.180|
                  |L27.116|
;;;377            }
;;;378    
;;;379            case E_TMR1:
;;;380            {
;;;381                if (bIsTimer1Used != FALSE)
000074  6850              LDR      r0,[r2,#4]  ; bIsTimer1Used
000076  2800              CMP      r0,#0
000078  d139              BNE      |L27.238|
;;;382                    return E_DRVTIMER_EIO;
;;;383    
;;;384                bIsTimer1Used = TRUE;
00007a  6057              STR      r7,[r2,#4]  ; bIsTimer1Used
;;;385    
;;;386                CLK->APBCLK_BITS.TMR1_EN = 1;
00007c  68b0              LDR      r0,[r6,#8]
00007e  2708              MOVS     r7,#8
000080  4338              ORRS     r0,r0,r7
000082  60b0              STR      r0,[r6,#8]
;;;387                
;;;388                TIMER1->CTL = 0;                  /* disable timer */
000084  4f2f              LDR      r7,|L27.324|
000086  6039              STR      r1,[r7,#0]
;;;389                TIMER1->ISR = 0x13;                             /* write 1 to clear for safty */
000088  613b              STR      r3,[r7,#0x10]
;;;390                uTime1EventCount = 0;
00008a  6351              STR      r1,[r2,#0x34]  ; uTime1EventCount
;;;391                for (i=0; i<TIMER_EVENT_COUNT; i++)
;;;392                {
;;;393                    tTime1Event[i].active = FALSE;
00008c  4b2b              LDR      r3,|L27.316|
00008e  2000              MOVS     r0,#0                 ;391
000090  3314              ADDS     r3,r3,#0x14
                  |L27.146|
000092  2614              MOVS     r6,#0x14
000094  4346              MULS     r6,r0,r6
000096  5199              STR      r1,[r3,r6]
000098  1c40              ADDS     r0,r0,#1              ;391
00009a  d0fa              BEQ      |L27.146|
;;;394                }
;;;395    
;;;396                uTimer1Tick = 0;
00009c  6251              STR      r1,[r2,#0x24]  ; uTimer1Tick
;;;397                _sys_uTimer1TickPerSecond = uTicksPerSecond;
00009e  6494              STR      r4,[r2,#0x48]  ; _sys_uTimer1TickPerSecond
;;;398    
;;;399                uRegTcmpr = CalTimerInitValue(GetTimerClock(E_TMR1), uTicksPerSecond); 
0000a0  2001              MOVS     r0,#1
;;;400                if(uRegTcmpr > 0xFFFFFF)        
0000a2  e03a              B        |L27.282|
                  |L27.164|
;;;401                {
;;;402                    return E_DRVTIMER_CLOCK_RATE;           
;;;403                }
;;;404    
;;;405                TIMER1->CMPR = (uRegTcmpr & 0xFFFFFF);  
0000a4  0201              LSLS     r1,r0,#8
0000a6  0a09              LSRS     r1,r1,#8
0000a8  60b9              STR      r1,[r7,#8]
;;;406                TIMER1->CTL_BITS.MODE_SEL = op_mode; 
0000aa  6839              LDR      r1,[r7,#0]
0000ac  2230              MOVS     r2,#0x30
0000ae  4391              BICS     r1,r1,r2
0000b0  4329              ORRS     r1,r1,r5
0000b2  6039              STR      r1,[r7,#0]
                  |L27.180|
;;;407                break;
;;;408            }
;;;409    
;;;410            case E_TMR2:
;;;411            {
;;;412                if (bIsTimer2Used != FALSE)
;;;413                    return E_DRVTIMER_EIO;    
;;;414    
;;;415                bIsTimer2Used = TRUE;
;;;416    
;;;417                CLK->APBCLK_BITS.TMR2_EN =1;
;;;418                
;;;419                TIMER2->CTL = 0;                  /* disable timer */
;;;420                TIMER2->ISR = 0x13;                             /* write 1 to clear for safty */
;;;421                uTime2EventCount = 0;
;;;422                for (i=0; i<TIMER_EVENT_COUNT; i++)
;;;423                {
;;;424                    tTime2Event[i].active = FALSE;
;;;425                }
;;;426    
;;;427                uTimer2Tick = 0;
;;;428                _sys_uTimer2TickPerSecond = uTicksPerSecond;
;;;429    
;;;430                uRegTcmpr = CalTimerInitValue(GetTimerClock(E_TMR2), uTicksPerSecond); 
;;;431                if(uRegTcmpr > 0xFFFFFF)        
;;;432                {
;;;433                    return E_DRVTIMER_CLOCK_RATE;           
;;;434                }
;;;435    
;;;436                TIMER2->CMPR = (uRegTcmpr & 0xFFFFFF);  
;;;437                TIMER2->CTL_BITS.MODE_SEL = op_mode; 
;;;438                break;
;;;439            }
;;;440    
;;;441            case E_TMR3:
;;;442            {
;;;443                if (bIsTimer3Used != FALSE)
;;;444                    return E_DRVTIMER_EIO;
;;;445    
;;;446                bIsTimer3Used = TRUE;
;;;447    
;;;448                CLK->APBCLK_BITS.TMR3_EN = 1;
;;;449    
;;;450                TIMER3->CTL = 0;                  /* disable timer */
;;;451                TIMER3->ISR = 0x13;                             /* write 1 to clear for safty */
;;;452                uTime3EventCount = 0;
;;;453                for (i=0; i<TIMER_EVENT_COUNT; i++)
;;;454                {
;;;455                    tTime3Event[i].active = FALSE;
;;;456                }
;;;457    
;;;458                uTimer3Tick = 0;
;;;459                _sys_uTimer3TickPerSecond = uTicksPerSecond;
;;;460                
;;;461                uRegTcmpr = CalTimerInitValue(GetTimerClock(E_TMR3), uTicksPerSecond); 
;;;462                if(uRegTcmpr > 0xFFFFFF)        
;;;463                {
;;;464                    return E_DRVTIMER_CLOCK_RATE;           
;;;465                }
;;;466    
;;;467                TIMER3->CMPR = (uRegTcmpr & 0xFFFFFF);  
;;;468                TIMER3->CTL_BITS.MODE_SEL = op_mode;    
;;;469                break;
;;;470            }
;;;471    
;;;472        }
;;;473    
;;;474        return E_SUCCESS;
0000b4  2000              MOVS     r0,#0
;;;475    }
0000b6  bdf8              POP      {r3-r7,pc}
                  |L27.184|
0000b8  6890              LDR      r0,[r2,#8]            ;412  ; bIsTimer2Used
0000ba  2800              CMP      r0,#0                 ;412
0000bc  d117              BNE      |L27.238|
0000be  6097              STR      r7,[r2,#8]            ;415  ; bIsTimer2Used
0000c0  68b0              LDR      r0,[r6,#8]            ;417
0000c2  2710              MOVS     r7,#0x10              ;417
0000c4  4338              ORRS     r0,r0,r7              ;417
0000c6  60b0              STR      r0,[r6,#8]            ;417
0000c8  4f1f              LDR      r7,|L27.328|
0000ca  6039              STR      r1,[r7,#0]            ;419
0000cc  613b              STR      r3,[r7,#0x10]         ;420
0000ce  6391              STR      r1,[r2,#0x38]         ;421  ; uTime2EventCount
0000d0  4b1a              LDR      r3,|L27.316|
0000d2  2000              MOVS     r0,#0                 ;422
0000d4  3328              ADDS     r3,r3,#0x28           ;424
                  |L27.214|
0000d6  2614              MOVS     r6,#0x14              ;424
0000d8  4346              MULS     r6,r0,r6              ;424
0000da  5199              STR      r1,[r3,r6]            ;424
0000dc  1c40              ADDS     r0,r0,#1              ;422
0000de  d0fa              BEQ      |L27.214|
0000e0  6291              STR      r1,[r2,#0x28]         ;427  ; uTimer2Tick
0000e2  64d4              STR      r4,[r2,#0x4c]         ;428  ; _sys_uTimer2TickPerSecond
0000e4  2002              MOVS     r0,#2                 ;430
0000e6  e018              B        |L27.282|
                  |L27.232|
0000e8  68d0              LDR      r0,[r2,#0xc]          ;443  ; bIsTimer3Used
0000ea  2800              CMP      r0,#0                 ;443
0000ec  d001              BEQ      |L27.242|
                  |L27.238|
0000ee  4817              LDR      r0,|L27.332|
0000f0  bdf8              POP      {r3-r7,pc}
                  |L27.242|
0000f2  60d7              STR      r7,[r2,#0xc]          ;446  ; bIsTimer3Used
0000f4  68b0              LDR      r0,[r6,#8]            ;448
0000f6  2720              MOVS     r7,#0x20              ;448
0000f8  4338              ORRS     r0,r0,r7              ;448
0000fa  60b0              STR      r0,[r6,#8]            ;448
0000fc  4f14              LDR      r7,|L27.336|
0000fe  6039              STR      r1,[r7,#0]            ;450
000100  613b              STR      r3,[r7,#0x10]         ;451
000102  63d1              STR      r1,[r2,#0x3c]         ;452  ; uTime3EventCount
000104  4b0d              LDR      r3,|L27.316|
000106  2000              MOVS     r0,#0                 ;453
000108  333c              ADDS     r3,r3,#0x3c           ;455
                  |L27.266|
00010a  2614              MOVS     r6,#0x14              ;455
00010c  4346              MULS     r6,r0,r6              ;455
00010e  5199              STR      r1,[r3,r6]            ;455
000110  1c40              ADDS     r0,r0,#1              ;453
000112  d0fa              BEQ      |L27.266|
000114  62d1              STR      r1,[r2,#0x2c]         ;458  ; uTimer3Tick
000116  6514              STR      r4,[r2,#0x50]         ;459  ; _sys_uTimer3TickPerSecond
000118  2003              MOVS     r0,#3                 ;461
                  |L27.282|
00011a  f7fffffe          BL       GetTimerClock
00011e  4621              MOV      r1,r4                 ;461
000120  f7fffffe          BL       CalTimerInitValue
000124  4906              LDR      r1,|L27.320|
000126  4288              CMP      r0,r1                 ;462
000128  d9bc              BLS      |L27.164|
                  |L27.298|
00012a  4808              LDR      r0,|L27.332|
00012c  1e40              SUBS     r0,r0,#1              ;464
00012e  bdf8              POP      {r3-r7,pc}
;;;476    
                          ENDP

                  |L27.304|
                          DCD      0x50000200
                  |L27.308|
                          DCD      ||.data||
                  |L27.312|
                          DCD      0x40010000
                  |L27.316|
                          DCD      ||.bss||
                  |L27.320|
                          DCD      0x00ffffff
                  |L27.324|
                          DCD      0x40010100
                  |L27.328|
                          DCD      0x40110000
                  |L27.332|
                          DCD      0xffff9703
                  |L27.336|
                          DCD      0x40110100

                          AREA ||i.DrvTIMER_OpenCounter||, CODE, READONLY, ALIGN=2

                  DrvTIMER_OpenCounter PROC
;;;496    /*---------------------------------------------------------------------------------------------------------*/
;;;497    int32_t DrvTIMER_OpenCounter(E_TIMER_CHANNEL ch, uint32_t uCounterBoundary, E_TIMER_OPMODE op_mode)
000000  b5f8              PUSH     {r3-r7,lr}
;;;498    {
;;;499        uint32_t i;
;;;500    
;;;501    
;;;502        assert_param(op_mode != E_TOGGLE_MODE)
;;;503        assert_param(ch <= E_TMR3);
;;;504                            
;;;505        switch (ch)
;;;506        {
;;;507            case E_TMR0:
;;;508            {
;;;509                if (bIsTimer0Used != FALSE)
;;;510                    return E_DRVTIMER_EIO;
;;;511                                       
;;;512                bIsTimer0Used = TRUE;
;;;513               
;;;514                CLK->APBCLK_BITS.TMR0_EN = 1;
;;;515    
;;;516                TIMER0->ISR_BITS.TMR_IS = 1;                /* Write 1 to clear for safty */
;;;517                
;;;518                TIMER0->CTL_BITS.MODE_SEL       = op_mode;  /* Set operation mode */
000002  0792              LSLS     r2,r2,#30
000004  2501              MOVS     r5,#1                 ;498
000006  2430              MOVS     r4,#0x30
000008  0e92              LSRS     r2,r2,#26
00000a  2300              MOVS     r3,#0                 ;498
00000c  2800              CMP      r0,#0                 ;505
00000e  d006              BEQ      |L28.30|
000010  2801              CMP      r0,#1                 ;505
000012  d029              BEQ      |L28.104|
000014  2802              CMP      r0,#2                 ;505
000016  d04d              BEQ      |L28.180|
000018  2803              CMP      r0,#3                 ;505
00001a  d124              BNE      |L28.102|
00001c  e070              B        |L28.256|
                  |L28.30|
00001e  4f4e              LDR      r7,|L28.344|
000020  683f              LDR      r7,[r7,#0]            ;509  ; bIsTimer0Used
000022  2f00              CMP      r7,#0                 ;509
000024  d170              BNE      |L28.264|
000026  4f4c              LDR      r7,|L28.344|
000028  603d              STR      r5,[r7,#0]            ;512  ; bIsTimer0Used
00002a  4e4c              LDR      r6,|L28.348|
00002c  68b7              LDR      r7,[r6,#8]            ;514
00002e  2604              MOVS     r6,#4                 ;514
000030  4337              ORRS     r7,r7,r6              ;514
000032  4e4a              LDR      r6,|L28.348|
000034  60b7              STR      r7,[r6,#8]            ;514
000036  4e4a              LDR      r6,|L28.352|
000038  6937              LDR      r7,[r6,#0x10]         ;516
00003a  432f              ORRS     r7,r7,r5              ;516
00003c  6137              STR      r7,[r6,#0x10]         ;516
00003e  6837              LDR      r7,[r6,#0]
000040  43a7              BICS     r7,r7,r4
000042  4317              ORRS     r7,r7,r2
000044  6037              STR      r7,[r6,#0]
;;;519                TIMER0->CMPR                = uCounterBoundary;
000046  60b1              STR      r1,[r6,#8]
;;;520                TIMER0->PRECNT              = 0;
000048  6073              STR      r3,[r6,#4]
;;;521                TIMER0->CTL_BITS.TMR_EN     = 1;             
00004a  6831              LDR      r1,[r6,#0]
00004c  4329              ORRS     r1,r1,r5
00004e  6031              STR      r1,[r6,#0]
;;;522                uTime0EventCount = 0;
000050  4941              LDR      r1,|L28.344|
000052  630b              STR      r3,[r1,#0x30]  ; uTime0EventCount
;;;523                for (i=0; i<TIMER_EVENT_COUNT; i++)
;;;524                {
;;;525                    tTime0Event[i].active = FALSE;
000054  4a43              LDR      r2,|L28.356|
000056  2100              MOVS     r1,#0                 ;523
                  |L28.88|
000058  2414              MOVS     r4,#0x14
00005a  434c              MULS     r4,r1,r4
00005c  5113              STR      r3,[r2,r4]
00005e  1c49              ADDS     r1,r1,#1              ;523
000060  d0fa              BEQ      |L28.88|
;;;526                }
;;;527                uTimer0Tick = 0;
000062  493d              LDR      r1,|L28.344|
000064  620b              STR      r3,[r1,#0x20]  ; uTimer0Tick
                  |L28.102|
;;;528                break;
000066  e072              B        |L28.334|
                  |L28.104|
;;;529            }
;;;530    
;;;531            case E_TMR1:
;;;532            {
;;;533                if (bIsTimer1Used != FALSE)
000068  4f3b              LDR      r7,|L28.344|
00006a  687f              LDR      r7,[r7,#4]  ; bIsTimer1Used
00006c  2f00              CMP      r7,#0
00006e  d14b              BNE      |L28.264|
;;;534                    return E_DRVTIMER_EIO;
;;;535    
;;;536                                       
;;;537                bIsTimer1Used = TRUE;
000070  4f39              LDR      r7,|L28.344|
000072  607d              STR      r5,[r7,#4]  ; bIsTimer1Used
;;;538               
;;;539                CLK->APBCLK_BITS.TMR1_EN = 1;
000074  4e39              LDR      r6,|L28.348|
000076  68b6              LDR      r6,[r6,#8]
000078  2708              MOVS     r7,#8
00007a  433e              ORRS     r6,r6,r7
00007c  4f37              LDR      r7,|L28.348|
00007e  60be              STR      r6,[r7,#8]
;;;540    
;;;541    
;;;542                TIMER1->ISR_BITS.TMR_IS         = 1;        /* Write 1 to clear for safty */            
000080  4e39              LDR      r6,|L28.360|
000082  6937              LDR      r7,[r6,#0x10]
000084  432f              ORRS     r7,r7,r5
000086  6137              STR      r7,[r6,#0x10]
;;;543                TIMER1->CTL_BITS.MODE_SEL       = op_mode;  /* Set operation mode */
000088  6837              LDR      r7,[r6,#0]
00008a  43a7              BICS     r7,r7,r4
00008c  4317              ORRS     r7,r7,r2
00008e  6037              STR      r7,[r6,#0]
;;;544                TIMER1->CMPR            = uCounterBoundary;
000090  60b1              STR      r1,[r6,#8]
;;;545                TIMER1->PRECNT  = 0;
000092  6073              STR      r3,[r6,#4]
;;;546                TIMER1->CTL_BITS.TMR_EN     = 1;                 
000094  6831              LDR      r1,[r6,#0]
000096  4329              ORRS     r1,r1,r5
000098  6031              STR      r1,[r6,#0]
;;;547                uTime1EventCount = 0;
00009a  492f              LDR      r1,|L28.344|
00009c  634b              STR      r3,[r1,#0x34]  ; uTime1EventCount
;;;548                for (i=0; i<TIMER_EVENT_COUNT; i++)
;;;549                {
;;;550                    tTime1Event[i].active = FALSE;
00009e  4a31              LDR      r2,|L28.356|
0000a0  2100              MOVS     r1,#0                 ;548
0000a2  3214              ADDS     r2,r2,#0x14
                  |L28.164|
0000a4  2414              MOVS     r4,#0x14
0000a6  434c              MULS     r4,r1,r4
0000a8  5113              STR      r3,[r2,r4]
0000aa  1c49              ADDS     r1,r1,#1              ;548
0000ac  d0fa              BEQ      |L28.164|
;;;551                }
;;;552                uTimer1Tick = 0;
0000ae  492a              LDR      r1,|L28.344|
0000b0  624b              STR      r3,[r1,#0x24]  ; uTimer1Tick
;;;553                break;
0000b2  e04c              B        |L28.334|
                  |L28.180|
;;;554            }
;;;555    
;;;556            case E_TMR2:
;;;557            {
;;;558                if (bIsTimer2Used != FALSE)
0000b4  4f28              LDR      r7,|L28.344|
0000b6  68bf              LDR      r7,[r7,#8]  ; bIsTimer2Used
0000b8  2f00              CMP      r7,#0
0000ba  d125              BNE      |L28.264|
;;;559                    return E_DRVTIMER_EIO;
;;;560    
;;;561                                       
;;;562                bIsTimer2Used = TRUE;
0000bc  4f26              LDR      r7,|L28.344|
0000be  60bd              STR      r5,[r7,#8]  ; bIsTimer2Used
;;;563               
;;;564                CLK->APBCLK_BITS.TMR2_EN = 1;
0000c0  4e26              LDR      r6,|L28.348|
0000c2  68b7              LDR      r7,[r6,#8]
0000c4  2610              MOVS     r6,#0x10
0000c6  4337              ORRS     r7,r7,r6
0000c8  4e24              LDR      r6,|L28.348|
0000ca  60b7              STR      r7,[r6,#8]
;;;565    
;;;566                TIMER2->ISR_BITS.TMR_IS         = 1;        /* Write 1 to clear for safty */            
0000cc  4e27              LDR      r6,|L28.364|
0000ce  6937              LDR      r7,[r6,#0x10]
0000d0  432f              ORRS     r7,r7,r5
0000d2  6137              STR      r7,[r6,#0x10]
;;;567                TIMER2->CTL_BITS.MODE_SEL       = op_mode;  /* Set operation mode */
0000d4  6837              LDR      r7,[r6,#0]
0000d6  43a7              BICS     r7,r7,r4
0000d8  4317              ORRS     r7,r7,r2
0000da  6037              STR      r7,[r6,#0]
;;;568                TIMER2->CMPR            = uCounterBoundary;
0000dc  60b1              STR      r1,[r6,#8]
;;;569                TIMER2->PRECNT  = 0;
0000de  6073              STR      r3,[r6,#4]
;;;570                TIMER2->CTL_BITS.TMR_EN     = 1;                 
0000e0  6831              LDR      r1,[r6,#0]
0000e2  4329              ORRS     r1,r1,r5
0000e4  6031              STR      r1,[r6,#0]
;;;571                uTime2EventCount = 0;
0000e6  491c              LDR      r1,|L28.344|
0000e8  638b              STR      r3,[r1,#0x38]  ; uTime2EventCount
;;;572                for (i=0; i<TIMER_EVENT_COUNT; i++)
;;;573                {
;;;574                    tTime2Event[i].active = FALSE;
0000ea  4a1e              LDR      r2,|L28.356|
0000ec  2100              MOVS     r1,#0                 ;572
0000ee  3228              ADDS     r2,r2,#0x28
                  |L28.240|
0000f0  2414              MOVS     r4,#0x14
0000f2  434c              MULS     r4,r1,r4
0000f4  5113              STR      r3,[r2,r4]
0000f6  1c49              ADDS     r1,r1,#1              ;572
0000f8  d0fa              BEQ      |L28.240|
;;;575                }
;;;576                uTimer2Tick = 0;
0000fa  4917              LDR      r1,|L28.344|
0000fc  628b              STR      r3,[r1,#0x28]  ; uTimer2Tick
;;;577                break;
0000fe  e026              B        |L28.334|
                  |L28.256|
;;;578            }
;;;579    
;;;580            case E_TMR3:
;;;581            {
;;;582                if (bIsTimer3Used != FALSE)
000100  4f15              LDR      r7,|L28.344|
000102  68ff              LDR      r7,[r7,#0xc]  ; bIsTimer3Used
000104  2f00              CMP      r7,#0
000106  d001              BEQ      |L28.268|
                  |L28.264|
;;;583                    return E_DRVTIMER_EIO;
000108  4819              LDR      r0,|L28.368|
;;;584    
;;;585                                       
;;;586                bIsTimer3Used = TRUE;
;;;587               
;;;588                CLK->APBCLK_BITS.TMR3_EN = 1;
;;;589    
;;;590                TIMER3->ISR_BITS.TMR_IS         = 1;        /* Write 1 to clear for safty */            
;;;591                TIMER3->CTL_BITS.MODE_SEL       = op_mode;  /* Set operation mode */
;;;592                TIMER3->CMPR            = uCounterBoundary;
;;;593                TIMER3->PRECNT  = 0;
;;;594                TIMER3->CTL_BITS.TMR_EN     = 1;                 
;;;595                uTime3EventCount = 0;
;;;596                for (i=0; i<TIMER_EVENT_COUNT; i++)
;;;597                {
;;;598                    tTime3Event[i].active = FALSE;
;;;599                }
;;;600                uTimer3Tick = 0;
;;;601                break;
;;;602            }
;;;603    
;;;604        }
;;;605        DrvTIMER_EnableExternalEventMode(ch, E_TIMER_EVENT_EDGE_RISING);
;;;606    
;;;607        return E_SUCCESS;
;;;608    }
00010a  bdf8              POP      {r3-r7,pc}
                  |L28.268|
00010c  4f12              LDR      r7,|L28.344|
00010e  60fd              STR      r5,[r7,#0xc]          ;586  ; bIsTimer3Used
000110  4e12              LDR      r6,|L28.348|
000112  68b7              LDR      r7,[r6,#8]            ;588
000114  2620              MOVS     r6,#0x20              ;588
000116  4337              ORRS     r7,r7,r6              ;588
000118  4e10              LDR      r6,|L28.348|
00011a  60b7              STR      r7,[r6,#8]            ;588
00011c  4e15              LDR      r6,|L28.372|
00011e  6937              LDR      r7,[r6,#0x10]         ;590
000120  432f              ORRS     r7,r7,r5              ;590
000122  6137              STR      r7,[r6,#0x10]         ;590
000124  6837              LDR      r7,[r6,#0]            ;591
000126  43a7              BICS     r7,r7,r4              ;591
000128  4317              ORRS     r7,r7,r2              ;591
00012a  6037              STR      r7,[r6,#0]            ;591
00012c  60b1              STR      r1,[r6,#8]            ;592
00012e  6073              STR      r3,[r6,#4]            ;593
000130  6831              LDR      r1,[r6,#0]            ;594
000132  4329              ORRS     r1,r1,r5              ;594
000134  6031              STR      r1,[r6,#0]            ;594
000136  4908              LDR      r1,|L28.344|
000138  63cb              STR      r3,[r1,#0x3c]         ;595  ; uTime3EventCount
00013a  4c0a              LDR      r4,|L28.356|
00013c  2100              MOVS     r1,#0                 ;596
00013e  343c              ADDS     r4,r4,#0x3c           ;598
                  |L28.320|
000140  2214              MOVS     r2,#0x14              ;598
000142  434a              MULS     r2,r1,r2              ;598
000144  50a3              STR      r3,[r4,r2]            ;598
000146  1c49              ADDS     r1,r1,#1              ;596
000148  d0fa              BEQ      |L28.320|
00014a  4903              LDR      r1,|L28.344|
00014c  62cb              STR      r3,[r1,#0x2c]         ;600  ; uTimer3Tick
                  |L28.334|
00014e  2101              MOVS     r1,#1                 ;605
000150  f7fffffe          BL       DrvTIMER_EnableExternalEventMode
000154  2000              MOVS     r0,#0                 ;607
000156  bdf8              POP      {r3-r7,pc}
;;;609    
                          ENDP

                  |L28.344|
                          DCD      ||.data||
                  |L28.348|
                          DCD      0x50000200
                  |L28.352|
                          DCD      0x40010000
                  |L28.356|
                          DCD      ||.bss||
                  |L28.360|
                          DCD      0x40010100
                  |L28.364|
                          DCD      0x40110000
                  |L28.368|
                          DCD      0xffff9703
                  |L28.372|
                          DCD      0x40110100

                          AREA ||i.DrvTIMER_Reset||, CODE, READONLY, ALIGN=1

                  DrvTIMER_Reset PROC
;;;1245     */
;;;1246   int32_t DrvTIMER_Reset(E_TIMER_CHANNEL ch)
000000  b510              PUSH     {r4,lr}
;;;1247   {
;;;1248       TIMER_TypeDef *base = _getBase(ch); 
000002  f7fffffe          BL       _getBase
;;;1249       assert_param(base != NULL); 
;;;1250           
;;;1251       base->CTL_BITS.SW_RST = 1;
000006  6801              LDR      r1,[r0,#0]
000008  2202              MOVS     r2,#2
00000a  4311              ORRS     r1,r1,r2
00000c  6001              STR      r1,[r0,#0]
                  |L29.14|
;;;1252       
;;;1253       while(base->CTL_BITS.SW_RST == 1);
00000e  6801              LDR      r1,[r0,#0]
000010  0789              LSLS     r1,r1,#30
000012  d4fc              BMI      |L29.14|
;;;1254       return(0);
000014  2000              MOVS     r0,#0
;;;1255   }
000016  bd10              POP      {r4,pc}
;;;1256   
                          ENDP


                          AREA ||i.DrvTIMER_ResetIntTicks||, CODE, READONLY, ALIGN=2

                  DrvTIMER_ResetIntTicks PROC
;;;1089   /*---------------------------------------------------------------------------------------------------------*/
;;;1090   int32_t DrvTIMER_ResetIntTicks(E_TIMER_CHANNEL ch)
000000  2200              MOVS     r2,#0
;;;1091   {
;;;1092       assert_param(ch <= E_TMR3);
;;;1093       switch (ch)
;;;1094       {
;;;1095           case E_TMR0:
;;;1096           {
;;;1097               uTimer0Tick = 0;
000002  4909              LDR      r1,|L30.40|
000004  2800              CMP      r0,#0                 ;1093
000006  d006              BEQ      |L30.22|
000008  2801              CMP      r0,#1                 ;1093
00000a  d006              BEQ      |L30.26|
00000c  2802              CMP      r0,#2                 ;1093
00000e  d006              BEQ      |L30.30|
000010  2803              CMP      r0,#3                 ;1093
000012  d107              BNE      |L30.36|
000014  e005              B        |L30.34|
                  |L30.22|
000016  620a              STR      r2,[r1,#0x20]  ; uTimer0Tick
;;;1098               break;
000018  e004              B        |L30.36|
                  |L30.26|
;;;1099           }
;;;1100   
;;;1101           case E_TMR1:
;;;1102           {
;;;1103               uTimer1Tick = 0;
00001a  624a              STR      r2,[r1,#0x24]  ; uTimer1Tick
;;;1104               break;
00001c  e002              B        |L30.36|
                  |L30.30|
;;;1105           }
;;;1106   
;;;1107           case E_TMR2:
;;;1108           {
;;;1109               uTimer2Tick = 0;
00001e  628a              STR      r2,[r1,#0x28]  ; uTimer2Tick
;;;1110               break;
000020  e000              B        |L30.36|
                  |L30.34|
;;;1111           }
;;;1112   
;;;1113           case E_TMR3:
;;;1114           {
;;;1115               uTimer3Tick = 0;
000022  62ca              STR      r2,[r1,#0x2c]  ; uTimer3Tick
                  |L30.36|
;;;1116               break;
;;;1117           }
;;;1118       }
;;;1119   
;;;1120       return E_SUCCESS;
000024  2000              MOVS     r0,#0
;;;1121   }
000026  4770              BX       lr
;;;1122   
                          ENDP

                  |L30.40|
                          DCD      ||.data||

                          AREA ||i.DrvTIMER_SetCompareValue||, CODE, READONLY, ALIGN=2

                  DrvTIMER_SetCompareValue PROC
;;;1471     */
;;;1472   int32_t DrvTIMER_SetCompareValue(E_TIMER_CHANNEL ch, uint32_t value)
000000  b510              PUSH     {r4,lr}
;;;1473   {
000002  460c              MOV      r4,r1
;;;1474       TIMER_TypeDef *base = _getBase(ch);
000004  f7fffffe          BL       _getBase
;;;1475       assert_param(base != NULL);    
;;;1476       if(value > TIMER_MAX_VAL || value < 2)
000008  4a04              LDR      r2,|L31.28|
00000a  1ea1              SUBS     r1,r4,#2
00000c  4291              CMP      r1,r2
00000e  d301              BCC      |L31.20|
;;;1477           return(E_DRVTIMER_EIO);
000010  4803              LDR      r0,|L31.32|
;;;1478       base->CMPR = value;
;;;1479       return(0);
;;;1480   }
000012  bd10              POP      {r4,pc}
                  |L31.20|
000014  6084              STR      r4,[r0,#8]            ;1478
000016  2000              MOVS     r0,#0                 ;1479
000018  bd10              POP      {r4,pc}
;;;1481   
                          ENDP

00001a  0000              DCW      0x0000
                  |L31.28|
                          DCD      0x00fffffe
                  |L31.32|
                          DCD      0xffff9703

                          AREA ||i.DrvTIMER_SetEXTClockFreq||, CODE, READONLY, ALIGN=2

                  DrvTIMER_SetEXTClockFreq PROC
;;;1164   /*---------------------------------------------------------------------------------------------------------*/
;;;1165   void DrvTIMER_SetEXTClockFreq(uint32_t u32ClockFreq)
000000  4901              LDR      r1,|L32.8|
;;;1166   {
;;;1167       u32EXTClockFreq = u32ClockFreq;
000002  6408              STR      r0,[r1,#0x40]  ; u32EXTClockFreq
;;;1168   }
000004  4770              BX       lr
;;;1169   
                          ENDP

000006  0000              DCW      0x0000
                  |L32.8|
                          DCD      ||.data||

                          AREA ||i.DrvTIMER_SetPrescale||, CODE, READONLY, ALIGN=1

                  DrvTIMER_SetPrescale PROC
;;;1227     */
;;;1228   int32_t DrvTIMER_SetPrescale(E_TIMER_CHANNEL ch, uint8_t prescale)
000000  b510              PUSH     {r4,lr}
;;;1229   {
000002  460c              MOV      r4,r1
;;;1230   
;;;1231       TIMER_TypeDef *base = _getBase(ch); 
000004  f7fffffe          BL       _getBase
;;;1232       assert_param(base != NULL); 
;;;1233       base->PRECNT = prescale;
000008  6044              STR      r4,[r0,#4]
;;;1234       return(0);
00000a  2000              MOVS     r0,#0
;;;1235   }
00000c  bd10              POP      {r4,pc}
;;;1236   
                          ENDP


                          AREA ||i.DrvTIMER_SetTimerEvent||, CODE, READONLY, ALIGN=2

                  DrvTIMER_SetTimerEvent PROC
;;;681    /*---------------------------------------------------------------------------------------------------------*/
;;;682    int32_t DrvTIMER_SetTimerEvent(E_TIMER_CHANNEL ch, uint32_t uInterruptTicks, TIMER_CALLBACK pTimerCallback, uint32_t parameter)
000000  b5f0              PUSH     {r4-r7,lr}
;;;683    {
000002  4604              MOV      r4,r0
;;;684        volatile int32_t i;
;;;685        int32_t uTimerEventNo = 0;
000004  2000              MOVS     r0,#0
;;;686    
;;;687        switch (ch)
;;;688        {
;;;689            case E_TMR0:
;;;690            {
;;;691                if (uTime0EventCount >= TIMER_EVENT_COUNT)
;;;692                    return E_DRVTIMER_EVENT_FULL;
000006  4f36              LDR      r7,|L34.224|
000008  4d36              LDR      r5,|L34.228|
00000a  2601              MOVS     r6,#1                 ;683
00000c  2c00              CMP      r4,#0                 ;687
00000e  d00a              BEQ      |L34.38|
000010  2c01              CMP      r4,#1                 ;687
000012  d024              BEQ      |L34.94|
000014  2c02              CMP      r4,#2                 ;687
000016  d03f              BEQ      |L34.152|
000018  2c03              CMP      r4,#3                 ;687
00001a  d103              BNE      |L34.36|
;;;693    
;;;694                bIsSetTime0Event = TRUE;
;;;695                uTime0EventCount++;
;;;696                for (i=0; i<TIMER_EVENT_COUNT; i++)
;;;697                {
;;;698                    if (tTime0Event[i].active  == FALSE)
;;;699                    {
;;;700                        tTime0Event[i].active       = TRUE;
;;;701                        tTime0Event[i].initTick     = uInterruptTicks;
;;;702                        tTime0Event[i].curTick      = uInterruptTicks;
;;;703                        tTime0Event[i].funPtr       = (TIMER_CALLBACK)pTimerCallback;
;;;704                        tTime0Event[i].transParam   = parameter;
;;;705                        uTimerEventNo = i;
;;;706                        break;
;;;707                    }
;;;708                }
;;;709                break;
;;;710            }
;;;711    
;;;712            case E_TMR1:
;;;713            {
;;;714                if (uTime1EventCount >= TIMER_EVENT_COUNT)
;;;715                    return E_DRVTIMER_EVENT_FULL;
;;;716    
;;;717                bIsSetTime1Event = TRUE;
;;;718                uTime1EventCount++;
;;;719                for (i=0; i<TIMER_EVENT_COUNT; i++)
;;;720                {
;;;721                    if (tTime1Event[i].active   == FALSE)
;;;722                    {
;;;723                        tTime1Event[i].active       = TRUE;
;;;724                        tTime1Event[i].initTick     = uInterruptTicks;
;;;725                        tTime1Event[i].curTick      = uInterruptTicks;
;;;726                        tTime1Event[i].funPtr       = (TIMER_CALLBACK)pTimerCallback;
;;;727                        tTime1Event[i].transParam   = parameter;
;;;728                        uTimerEventNo = i;
;;;729                        break;
;;;730                    }
;;;731                }
;;;732                break;
;;;733            }
;;;734    
;;;735            case E_TMR2:
;;;736            {
;;;737                if (uTime2EventCount >= TIMER_EVENT_COUNT)
;;;738                    return E_DRVTIMER_EVENT_FULL;
;;;739    
;;;740                bIsSetTime2Event = TRUE;
;;;741                uTime2EventCount++;
;;;742                for (i=0; i<TIMER_EVENT_COUNT; i++)
;;;743                {
;;;744                    if (tTime2Event[i].active   == FALSE)
;;;745                    {
;;;746                        tTime2Event[i].active       = TRUE;
;;;747                        tTime2Event[i].initTick     = uInterruptTicks;
;;;748                        tTime2Event[i].curTick      = uInterruptTicks;
;;;749                        tTime2Event[i].funPtr       = (TIMER_CALLBACK)pTimerCallback;
;;;750                        tTime2Event[i].transParam   = parameter;
;;;751                        uTimerEventNo = i;
;;;752                        break;
;;;753                    }
;;;754                }
;;;755                break;
;;;756            }
;;;757    
;;;758            case E_TMR3:
;;;759            {
;;;760                if (uTime3EventCount >= TIMER_EVENT_COUNT)
00001c  6bec              LDR      r4,[r5,#0x3c]  ; uTime3EventCount
00001e  2c00              CMP      r4,#0
000020  d04d              BEQ      |L34.190|
                  |L34.34|
;;;761                    return E_DRVTIMER_EVENT_FULL;
000022  4638              MOV      r0,r7
                  |L34.36|
;;;762    
;;;763                bIsSetTime3Event = TRUE;
;;;764                uTime3EventCount++;
;;;765                for (i=0; i<TIMER_EVENT_COUNT; i++)
;;;766                {
;;;767                    if (tTime3Event[i].active   == FALSE)
;;;768                    {
;;;769                        tTime3Event[i].active       = TRUE;
;;;770                        tTime3Event[i].initTick     = uInterruptTicks;
;;;771                        tTime3Event[i].curTick      = uInterruptTicks;
;;;772                        tTime3Event[i].funPtr       = (TIMER_CALLBACK)pTimerCallback;
;;;773                        tTime3Event[i].transParam   = parameter;
;;;774                        uTimerEventNo = i;
;;;775                        break;
;;;776                    }
;;;777                }
;;;778                break;
;;;779            }
;;;780    
;;;781            default:
;;;782            {
;;;783                break;
;;;784            }
;;;785        }
;;;786    
;;;787        return uTimerEventNo;
;;;788    }
000024  bdf0              POP      {r4-r7,pc}
                  |L34.38|
000026  6b2c              LDR      r4,[r5,#0x30]         ;691  ; uTime0EventCount
000028  2c00              CMP      r4,#0                 ;691
00002a  d1fa              BNE      |L34.34|
00002c  612e              STR      r6,[r5,#0x10]         ;694  ; bIsSetTime0Event
00002e  6b2c              LDR      r4,[r5,#0x30]         ;695  ; uTime0EventCount
000030  1c64              ADDS     r4,r4,#1              ;695
000032  632c              STR      r4,[r5,#0x30]         ;695  ; uTime0EventCount
000034  4f2c              LDR      r7,|L34.232|
000036  2400              MOVS     r4,#0                 ;696
                  |L34.56|
000038  2514              MOVS     r5,#0x14              ;698
00003a  4365              MULS     r5,r4,r5              ;698
00003c  597d              LDR      r5,[r7,r5]            ;698
00003e  2d00              CMP      r5,#0                 ;698
000040  d003              BEQ      |L34.74|
000042  1c64              ADDS     r4,r4,#1              ;696
000044  2c01              CMP      r4,#1                 ;696
000046  dbf7              BLT      |L34.56|
000048  bdf0              POP      {r4-r7,pc}
                  |L34.74|
00004a  4620              MOV      r0,r4                 ;700
00004c  2514              MOVS     r5,#0x14              ;700
00004e  4368              MULS     r0,r5,r0              ;700
000050  503e              STR      r6,[r7,r0]            ;700
000052  19c0              ADDS     r0,r0,r7              ;701
000054  6041              STR      r1,[r0,#4]            ;702
000056  3008              ADDS     r0,r0,#8              ;705
000058  c00e              STM      r0!,{r1-r3}           ;705
00005a  4620              MOV      r0,r4                 ;705
00005c  bdf0              POP      {r4-r7,pc}
                  |L34.94|
00005e  6b6c              LDR      r4,[r5,#0x34]         ;714  ; uTime1EventCount
000060  2c00              CMP      r4,#0                 ;714
000062  d1de              BNE      |L34.34|
000064  616e              STR      r6,[r5,#0x14]         ;717  ; bIsSetTime1Event
000066  6b6c              LDR      r4,[r5,#0x34]         ;718  ; uTime1EventCount
000068  1c64              ADDS     r4,r4,#1              ;718
00006a  636c              STR      r4,[r5,#0x34]         ;718  ; uTime1EventCount
00006c  4f1e              LDR      r7,|L34.232|
00006e  2500              MOVS     r5,#0                 ;719
000070  3714              ADDS     r7,r7,#0x14           ;721
                  |L34.114|
000072  2414              MOVS     r4,#0x14              ;721
000074  436c              MULS     r4,r5,r4              ;721
000076  593c              LDR      r4,[r7,r4]            ;721
000078  2c00              CMP      r4,#0                 ;721
00007a  d003              BEQ      |L34.132|
00007c  1c6d              ADDS     r5,r5,#1              ;719
00007e  2d01              CMP      r5,#1                 ;719
000080  dbf7              BLT      |L34.114|
000082  bdf0              POP      {r4-r7,pc}
                  |L34.132|
000084  4628              MOV      r0,r5                 ;723
000086  2414              MOVS     r4,#0x14              ;723
000088  4360              MULS     r0,r4,r0              ;723
00008a  503e              STR      r6,[r7,r0]            ;723
00008c  19c0              ADDS     r0,r0,r7              ;724
00008e  6041              STR      r1,[r0,#4]            ;725
000090  3008              ADDS     r0,r0,#8              ;728
000092  c00e              STM      r0!,{r1-r3}           ;728
000094  4628              MOV      r0,r5                 ;728
000096  bdf0              POP      {r4-r7,pc}
                  |L34.152|
000098  6bac              LDR      r4,[r5,#0x38]         ;737  ; uTime2EventCount
00009a  2c00              CMP      r4,#0                 ;737
00009c  d1c1              BNE      |L34.34|
00009e  61ae              STR      r6,[r5,#0x18]         ;740  ; bIsSetTime2Event
0000a0  6bac              LDR      r4,[r5,#0x38]         ;741  ; uTime2EventCount
0000a2  1c64              ADDS     r4,r4,#1              ;741
0000a4  63ac              STR      r4,[r5,#0x38]         ;741  ; uTime2EventCount
0000a6  4f10              LDR      r7,|L34.232|
0000a8  2400              MOVS     r4,#0                 ;742
0000aa  3728              ADDS     r7,r7,#0x28           ;744
                  |L34.172|
0000ac  2514              MOVS     r5,#0x14              ;744
0000ae  4365              MULS     r5,r4,r5              ;744
0000b0  597d              LDR      r5,[r7,r5]            ;744
0000b2  2d00              CMP      r5,#0                 ;744
0000b4  d0c9              BEQ      |L34.74|
0000b6  1c64              ADDS     r4,r4,#1              ;742
0000b8  2c01              CMP      r4,#1                 ;742
0000ba  dbf7              BLT      |L34.172|
0000bc  bdf0              POP      {r4-r7,pc}
                  |L34.190|
0000be  61ee              STR      r6,[r5,#0x1c]         ;763  ; bIsSetTime3Event
0000c0  6bec              LDR      r4,[r5,#0x3c]         ;764  ; uTime3EventCount
0000c2  1c64              ADDS     r4,r4,#1              ;764
0000c4  63ec              STR      r4,[r5,#0x3c]         ;764  ; uTime3EventCount
0000c6  4f08              LDR      r7,|L34.232|
0000c8  2400              MOVS     r4,#0                 ;765
0000ca  373c              ADDS     r7,r7,#0x3c           ;767
                  |L34.204|
0000cc  2514              MOVS     r5,#0x14              ;767
0000ce  4365              MULS     r5,r4,r5              ;767
0000d0  597d              LDR      r5,[r7,r5]            ;767
0000d2  2d00              CMP      r5,#0                 ;767
0000d4  d0b9              BEQ      |L34.74|
0000d6  1c64              ADDS     r4,r4,#1              ;765
0000d8  2c01              CMP      r4,#1                 ;765
0000da  dbf7              BLT      |L34.204|
0000dc  bdf0              POP      {r4-r7,pc}
;;;789    
                          ENDP

0000de  0000              DCW      0x0000
                  |L34.224|
                          DCD      0xffff9704
                  |L34.228|
                          DCD      ||.data||
                  |L34.232|
                          DCD      ||.bss||

                          AREA ||i.DrvTIMER_Start||, CODE, READONLY, ALIGN=1

                  DrvTIMER_Start PROC
;;;1006   /*---------------------------------------------------------------------------------------------------------*/
;;;1007   int32_t DrvTIMER_Start(E_TIMER_CHANNEL ch)
000000  b510              PUSH     {r4,lr}
;;;1008   {
;;;1009       TIMER_TypeDef *base = _getBase(ch);
000002  f7fffffe          BL       _getBase
;;;1010       assert_param(base != NULL); 
;;;1011       base->CTL_BITS.TMR_EN = 1;
000006  6801              LDR      r1,[r0,#0]
000008  2201              MOVS     r2,#1
00000a  4311              ORRS     r1,r1,r2
00000c  6001              STR      r1,[r0,#0]
;;;1012       return(0);
00000e  2000              MOVS     r0,#0
;;;1013   }
000010  bd10              POP      {r4,pc}
;;;1014   
                          ENDP


                          AREA ||i.DrvTIMER_StartCounter||, CODE, READONLY, ALIGN=1

                  DrvTIMER_StartCounter PROC
;;;1027   /*---------------------------------------------------------------------------------------------------------*/
;;;1028   int32_t DrvTIMER_StartCounter(E_TIMER_CHANNEL ch)
000000  b510              PUSH     {r4,lr}
;;;1029   {
000002  4604              MOV      r4,r0
;;;1030       DrvTIMER_Reset(ch);
000004  f7fffffe          BL       DrvTIMER_Reset
;;;1031   
;;;1032       return(DrvTIMER_Start(ch));
000008  4620              MOV      r0,r4
00000a  f7fffffe          BL       DrvTIMER_Start
;;;1033   }
00000e  bd10              POP      {r4,pc}
;;;1034   
                          ENDP


                          AREA ||i.DrvTIMER_Stop||, CODE, READONLY, ALIGN=1

                  DrvTIMER_Stop PROC
;;;1211     */
;;;1212   int32_t DrvTIMER_Stop(E_TIMER_CHANNEL ch)
000000  b510              PUSH     {r4,lr}
;;;1213   {
;;;1214   
;;;1215       TIMER_TypeDef *base = _getBase(ch); 
000002  f7fffffe          BL       _getBase
;;;1216       assert_param(base != NULL); 
;;;1217       base->CTL_BITS.TMR_EN = 0;
000006  6801              LDR      r1,[r0,#0]
000008  0849              LSRS     r1,r1,#1
00000a  0049              LSLS     r1,r1,#1
00000c  6001              STR      r1,[r0,#0]
;;;1218       return(0);
00000e  2000              MOVS     r0,#0
;;;1219   }
000010  bd10              POP      {r4,pc}
;;;1220   
                          ENDP


                          AREA ||i.DrvWDT_Close||, CODE, READONLY, ALIGN=2

                  DrvWDT_Close PROC
;;;1610   /*---------------------------------------------------------------------------------------------------------*/
;;;1611   void DrvWDT_Close(void)
000000  b510              PUSH     {r4,lr}
;;;1612   {
;;;1613       DrvWDT_Ioctl(E_WDT_IOC_STOP_TIMER, 0);     /* Stop WDT */
000002  2100              MOVS     r1,#0
000004  2001              MOVS     r0,#1
000006  f7fffffe          BL       DrvWDT_Ioctl
;;;1614       DrvWDT_Ioctl(E_WDT_IOC_DISABLE_INT, 0);    /* Disable WDT Interrupt */
00000a  2100              MOVS     r1,#0
00000c  2003              MOVS     r0,#3
00000e  f7fffffe          BL       DrvWDT_Ioctl
;;;1615   
;;;1616       CLK->APBCLK_BITS.WDT_EN = 0;
000012  4803              LDR      r0,|L38.32|
000014  6881              LDR      r1,[r0,#8]
000016  0849              LSRS     r1,r1,#1
000018  0049              LSLS     r1,r1,#1
00001a  6081              STR      r1,[r0,#8]
;;;1617   }
00001c  bd10              POP      {r4,pc}
;;;1618   
                          ENDP

00001e  0000              DCW      0x0000
                  |L38.32|
                          DCD      0x50000200

                          AREA ||i.DrvWDT_InstallISR||, CODE, READONLY, ALIGN=2

                  DrvWDT_InstallISR PROC
;;;1629   /*---------------------------------------------------------------------------------------------------------*/
;;;1630   void DrvWDT_InstallISR(WDT_CALLBACK pvWDTISR, uint32_t param)
000000  4a04              LDR      r2,|L39.20|
;;;1631   {
;;;1632       fnCallBack_WDT = (WDT_CALLBACK)pvWDTISR; 
;;;1633       wdt_param = param;
;;;1634       WDT->IER_BITS.WDT_IE = 1 ;  
000002  6551              STR      r1,[r2,#0x54]  ; wdt_param
000004  6590              STR      r0,[r2,#0x58]  ; fnCallBack_WDT
000006  4804              LDR      r0,|L39.24|
000008  6841              LDR      r1,[r0,#4]
00000a  2201              MOVS     r2,#1
00000c  4311              ORRS     r1,r1,r2
00000e  6041              STR      r1,[r0,#4]
;;;1635       
;;;1636   }
000010  4770              BX       lr
;;;1637   
                          ENDP

000012  0000              DCW      0x0000
                  |L39.20|
                          DCD      ||.data||
                  |L39.24|
                          DCD      0x40004000

                          AREA ||i.DrvWDT_Ioctl||, CODE, READONLY, ALIGN=2

                  DrvWDT_Ioctl PROC
;;;1664   /*---------------------------------------------------------------------------------------------------------*/
;;;1665   int32_t DrvWDT_Ioctl(E_WDT_CMD uWDTCmd, uint32_t uArgument)
000000  b5f8              PUSH     {r3-r7,lr}
;;;1666   {
000002  2708              MOVS     r7,#8
000004  2604              MOVS     r6,#4
000006  2502              MOVS     r5,#2
000008  2401              MOVS     r4,#1
;;;1667   	assert_param(uWDTCmd < E_WDT_IOC_INVALID);
;;;1668   
;;;1669       switch (uWDTCmd)
;;;1670       {
;;;1671           case E_WDT_IOC_START_TIMER  :
;;;1672           {
;;;1673               WDT->CTL_BITS.WTE = 1;
00000a  4a1f              LDR      r2,|L40.136|
00000c  0003              MOVS     r3,r0                 ;1669
00000e  f7fffffe          BL       __ARM_common_switch8
000012  0b07              DCB      0x0b,0x07
000014  0a0e151e          DCB      0x0a,0x0e,0x15,0x1e
000018  2124272a          DCB      0x21,0x24,0x27,0x2a
00001c  2d331c00          DCB      0x2d,0x33,0x1c,0x00
000020  6810              LDR      r0,[r2,#0]
000022  4338              ORRS     r0,r0,r7
;;;1674               break ;
000024  e001              B        |L40.42|
;;;1675           }
;;;1676   
;;;1677           case E_WDT_IOC_STOP_TIMER :
;;;1678           {
;;;1679               WDT->CTL_BITS.WTE = 0;
000026  6810              LDR      r0,[r2,#0]
000028  43b8              BICS     r0,r0,r7
                  |L40.42|
00002a  6010              STR      r0,[r2,#0]            ;1673
00002c  e00d              B        |L40.74|
;;;1680               break ;
;;;1681           }
;;;1682   
;;;1683           case E_WDT_IOC_ENABLE_INT :
;;;1684           {
;;;1685               WDT->IER_BITS.WDT_IE = 1;
00002e  6850              LDR      r0,[r2,#4]
000030  4320              ORRS     r0,r0,r4
000032  6050              STR      r0,[r2,#4]
;;;1686               NVIC_EnableIRQ(WDT_IRQn); 
000034  2001              MOVS     r0,#1
000036  f7fffffe          BL       NVIC_EnableIRQ
;;;1687               break ;
00003a  e006              B        |L40.74|
;;;1688           }
;;;1689   
;;;1690           case E_WDT_IOC_DISABLE_INT :
;;;1691           {
;;;1692               WDT->IER_BITS.WDT_IE = 0;
00003c  6850              LDR      r0,[r2,#4]
00003e  0840              LSRS     r0,r0,#1
000040  0040              LSLS     r0,r0,#1
000042  6050              STR      r0,[r2,#4]
;;;1693               NVIC_DisableIRQ(WDT_IRQn); 
000044  2001              MOVS     r0,#1
000046  f7fffffe          BL       NVIC_DisableIRQ
                  |L40.74|
;;;1694               break ;
;;;1695           }
;;;1696   
;;;1697           case E_WDT_IOC_ENABLE_WAKEUP :
;;;1698           {
;;;1699               WDT->CTL_BITS.WTWKE = 1;            
;;;1700               break ;
;;;1701           }
;;;1702   
;;;1703           case E_WDT_IOC_DISABLE_WAKEUP :
;;;1704           {
;;;1705               WDT->CTL_BITS.WTWKE = 0;            
;;;1706               break ;
;;;1707           }
;;;1708   
;;;1709           case E_WDT_IOC_RESET_TIMER:
;;;1710           {
;;;1711               WDT->CTL_BITS.WTR = 1;
;;;1712               break ;
;;;1713           }
;;;1714   
;;;1715           case E_WDT_IOC_ENABLE_RESET_FUNC :
;;;1716           {
;;;1717               WDT->CTL_BITS.WTRE = 1;
;;;1718               break ;
;;;1719           }
;;;1720   
;;;1721           case E_WDT_IOC_DISABLE_RESET_FUNC:
;;;1722           {
;;;1723               WDT->CTL_BITS.WTRE = 0;
;;;1724               break ;
;;;1725           }
;;;1726   
;;;1727           case E_WDT_IOC_SET_INTERVAL:
;;;1728           {
;;;1729               WDT->CTL_BITS.WTIS = (E_WDT_INTERVAL)uArgument;
;;;1730   
;;;1731               break ;
;;;1732           }
;;;1733   
;;;1734           case E_WDT_IOC_SET_DELAY:
;;;1735           {
;;;1736               WDT->CTL_BITS.WTRDSEL = (E_WDT_DELAY)uArgument;
;;;1737   
;;;1738               break ;
;;;1739           }
;;;1740       }
;;;1741   
;;;1742       return E_SUCCESS;
00004a  2000              MOVS     r0,#0
;;;1743   }
00004c  bdf8              POP      {r3-r7,pc}
00004e  6810              LDR      r0,[r2,#0]            ;1699
000050  4330              ORRS     r0,r0,r6              ;1699
000052  e7ea              B        |L40.42|
000054  6810              LDR      r0,[r2,#0]            ;1705
000056  43b0              BICS     r0,r0,r6              ;1705
000058  e7e7              B        |L40.42|
00005a  6810              LDR      r0,[r2,#0]            ;1711
00005c  4320              ORRS     r0,r0,r4              ;1711
00005e  e7e4              B        |L40.42|
000060  6810              LDR      r0,[r2,#0]            ;1717
000062  4328              ORRS     r0,r0,r5              ;1717
000064  e7e1              B        |L40.42|
000066  6810              LDR      r0,[r2,#0]            ;1723
000068  43a8              BICS     r0,r0,r5              ;1723
00006a  e7de              B        |L40.42|
00006c  6810              LDR      r0,[r2,#0]            ;1729
00006e  2370              MOVS     r3,#0x70              ;1729
000070  4398              BICS     r0,r0,r3              ;1729
000072  0749              LSLS     r1,r1,#29             ;1729
000074  0e49              LSRS     r1,r1,#25             ;1729
000076  e005              B        |L40.132|
000078  6810              LDR      r0,[r2,#0]            ;1736
00007a  2303              MOVS     r3,#3                 ;1736
00007c  021b              LSLS     r3,r3,#8              ;1736
00007e  4398              BICS     r0,r0,r3              ;1736
000080  0789              LSLS     r1,r1,#30             ;1736
000082  0d89              LSRS     r1,r1,#22             ;1736
                  |L40.132|
000084  4308              ORRS     r0,r0,r1              ;1736
000086  e7d0              B        |L40.42|
;;;1744   
                          ENDP

                  |L40.136|
                          DCD      0x40004000

                          AREA ||i.DrvWDT_Open||, CODE, READONLY, ALIGN=2

                  DrvWDT_Open PROC
;;;1591   /*---------------------------------------------------------------------------------------------------------*/
;;;1592   void DrvWDT_Open(E_WDT_INTERVAL WDTlevel)
000000  b510              PUSH     {r4,lr}
;;;1593   {
000002  4604              MOV      r4,r0
;;;1594       DrvWDT_Ioctl(E_WDT_IOC_STOP_TIMER, 0);  /* Stop WDT first */
000004  2100              MOVS     r1,#0
000006  2001              MOVS     r0,#1
000008  f7fffffe          BL       DrvWDT_Ioctl
;;;1595   
;;;1596       CLK->APBCLK_BITS.WDT_EN = 1;  /* Enable WatchDog Timer Clock */    
00000c  4806              LDR      r0,|L41.40|
00000e  6881              LDR      r1,[r0,#8]
000010  2201              MOVS     r2,#1
000012  4311              ORRS     r1,r1,r2
000014  6081              STR      r1,[r0,#8]
;;;1597   
;;;1598       WDT->CTL_BITS.WTIS = WDTlevel;  /* Select WatchDog Timer Interval */
000016  4a05              LDR      r2,|L41.44|
000018  6811              LDR      r1,[r2,#0]
00001a  2070              MOVS     r0,#0x70
00001c  4381              BICS     r1,r1,r0
00001e  0760              LSLS     r0,r4,#29
000020  0e40              LSRS     r0,r0,#25
000022  4301              ORRS     r1,r1,r0
000024  6011              STR      r1,[r2,#0]
;;;1599   }
000026  bd10              POP      {r4,pc}
;;;1600   
                          ENDP

                  |L41.40|
                          DCD      0x50000200
                  |L41.44|
                          DCD      0x40004000

                          AREA ||i.DrvWWDT_EnableInterrupt||, CODE, READONLY, ALIGN=2

                  DrvWWDT_EnableInterrupt PROC
;;;1813     */
;;;1814   void DrvWWDT_EnableInterrupt(void)
000000  b510              PUSH     {r4,lr}
;;;1815   {
;;;1816   
;;;1817   	WWDT->STS = 1;	// clear pending interrupt, if any
000002  4804              LDR      r0,|L42.20|
000004  2101              MOVS     r1,#1
000006  60c1              STR      r1,[r0,#0xc]
;;;1818   	WWDT->IER = 1;
000008  6081              STR      r1,[r0,#8]
;;;1819   
;;;1820   	NVIC_EnableIRQ(WDT_IRQn);
00000a  4608              MOV      r0,r1
00000c  f7fffffe          BL       NVIC_EnableIRQ
;;;1821   	
;;;1822   	return;
;;;1823   }
000010  bd10              POP      {r4,pc}
;;;1824   
                          ENDP

000012  0000              DCW      0x0000
                  |L42.20|
                          DCD      0x40004100

                          AREA ||i.DrvWWDT_GetCounter||, CODE, READONLY, ALIGN=2

                  DrvWWDT_GetCounter PROC
;;;1831     */
;;;1832   int8_t DrvWWDT_GetCounter(void)
000000  4801              LDR      r0,|L43.8|
;;;1833   {
;;;1834   
;;;1835   	return(WWDT->VAL);
000002  6900              LDR      r0,[r0,#0x10]
000004  b240              SXTB     r0,r0
;;;1836   
;;;1837   }
000006  4770              BX       lr
;;;1838   
                          ENDP

                  |L43.8|
                          DCD      0x40004100

                          AREA ||i.DrvWWDT_IsResetSource||, CODE, READONLY, ALIGN=2

                  DrvWWDT_IsResetSource PROC
;;;1795     */
;;;1796   int8_t DrvWWDT_IsResetSource(void)
000000  4903              LDR      r1,|L44.16|
;;;1797   {
;;;1798   	int8_t ret = (WWDT->STS_BITS.RF == 1) ? 1 : 0;
000002  68c8              LDR      r0,[r1,#0xc]
000004  0780              LSLS     r0,r0,#30
000006  0fc0              LSRS     r0,r0,#31
;;;1799   	
;;;1800   	if(ret)
000008  d001              BEQ      |L44.14|
;;;1801   		WWDT->STS = 2;
00000a  2202              MOVS     r2,#2
00000c  60ca              STR      r2,[r1,#0xc]
                  |L44.14|
;;;1802   	
;;;1803   	return(ret);
;;;1804   
;;;1805   }
00000e  4770              BX       lr
;;;1806   
                          ENDP

                  |L44.16|
                          DCD      0x40004100

                          AREA ||i.DrvWWDT_Open||, CODE, READONLY, ALIGN=2

                  DrvWWDT_Open PROC
;;;1752     */
;;;1753   void DrvWWDT_Open(E_WWDT_PRESCALE prescale, uint8_t cmp)
000000  0200              LSLS     r0,r0,#8
;;;1754   {		
;;;1755   	assert_param(cmp < 64);
;;;1756   	WWDT->CR = (prescale << 8) | (cmp << 16) | 1;
000002  0409              LSLS     r1,r1,#16
000004  4308              ORRS     r0,r0,r1
000006  4902              LDR      r1,|L45.16|
000008  1c40              ADDS     r0,r0,#1
00000a  6048              STR      r0,[r1,#4]
;;;1757   
;;;1758   	return;
;;;1759   }
00000c  4770              BX       lr
;;;1760   
                          ENDP

00000e  0000              DCW      0x0000
                  |L45.16|
                          DCD      0x40004100

                          AREA ||i.DrvWWDT_RegisterCallback||, CODE, READONLY, ALIGN=2

                  DrvWWDT_RegisterCallback PROC
;;;1780     */
;;;1781   void DrvWWDT_RegisterCallback(WDT_CALLBACK pvWWDTISR, uint32_t param)
000000  4a01              LDR      r2,|L46.8|
;;;1782   {
;;;1783       fnCallBack_WWDT = pvWWDTISR;
;;;1784   	wwdt_param = param;
000002  65d1              STR      r1,[r2,#0x5c]  ; wwdt_param
000004  6610              STR      r0,[r2,#0x60]  ; fnCallBack_WWDT
;;;1785       return;
;;;1786   }
000006  4770              BX       lr
;;;1787   
                          ENDP

                  |L46.8|
                          DCD      ||.data||

                          AREA ||i.DrvWWDT_Reload||, CODE, READONLY, ALIGN=2

                  DrvWWDT_Reload PROC
;;;1766     */
;;;1767   void DrvWWDT_Reload(void)
000000  4902              LDR      r1,|L47.12|
;;;1768   {
;;;1769   	WWDT->RLD = WWDT_RELOAD_KEY;	
000002  4801              LDR      r0,|L47.8|
000004  6008              STR      r0,[r1,#0]
;;;1770   
;;;1771   }
000006  4770              BX       lr
;;;1772   
                          ENDP

                  |L47.8|
                          DCD      0x00005aa5
                  |L47.12|
                          DCD      0x40004100

                          AREA ||i.GetTimerClock||, CODE, READONLY, ALIGN=2

                  GetTimerClock PROC
;;;97     /*---------------------------------------------------------------------------------------------------------*/
;;;98     static uint32_t GetTimerClock(E_TIMER_CHANNEL ch)
000000  b510              PUSH     {r4,lr}
;;;99     {
;;;100        volatile uint8_t u8ClockcSrc = 0;
000002  2100              MOVS     r1,#0
;;;101        volatile uint32_t u32clk = 0;
;;;102    
;;;103    	assert_param(ch <= E_TMR3);
;;;104        
;;;105        if(ch == E_TMR0)
;;;106            u8ClockcSrc = CLK->CLKSEL1_BITS.TMR0_S;
000004  4a14              LDR      r2,|L48.88|
000006  2800              CMP      r0,#0                 ;105
000008  d006              BEQ      |L48.24|
;;;107        else if(ch == E_TMR1)
00000a  2801              CMP      r0,#1
00000c  d006              BEQ      |L48.28|
;;;108            u8ClockcSrc = CLK->CLKSEL1_BITS.TMR1_S;        
;;;109        else if(ch == E_TMR2)
00000e  2802              CMP      r0,#2
000010  d006              BEQ      |L48.32|
;;;110            u8ClockcSrc = CLK->CLKSEL2_BITS.TMR2_S; 
;;;111        else if(ch == E_TMR3)
000012  2803              CMP      r0,#3
000014  d007              BEQ      |L48.38|
000016  e009              B        |L48.44|
                  |L48.24|
000018  6950              LDR      r0,[r2,#0x14]         ;106
00001a  e002              B        |L48.34|
                  |L48.28|
00001c  6950              LDR      r0,[r2,#0x14]         ;108
00001e  e003              B        |L48.40|
                  |L48.32|
000020  6990              LDR      r0,[r2,#0x18]         ;110
                  |L48.34|
000022  0540              LSLS     r0,r0,#21             ;106
000024  e001              B        |L48.42|
                  |L48.38|
;;;112            u8ClockcSrc = CLK->CLKSEL2_BITS.TMR3_S;      
000026  6990              LDR      r0,[r2,#0x18]
                  |L48.40|
000028  0440              LSLS     r0,r0,#17             ;108
                  |L48.42|
00002a  0f41              LSRS     r1,r0,#29
                  |L48.44|
;;;113    
;;;114            
;;;115        switch(u8ClockcSrc) {
00002c  2900              CMP      r1,#0
00002e  d007              BEQ      |L48.64|
000030  2901              CMP      r1,#1
000032  d008              BEQ      |L48.70|
000034  2902              CMP      r1,#2
000036  d009              BEQ      |L48.76|
000038  2903              CMP      r1,#3
00003a  d009              BEQ      |L48.80|
;;;116            case 0:
;;;117                u32clk = DrvSYS_GetExtClockFreq() ;
;;;118                break;
;;;119            case 1:
;;;120                u32clk = __RTC_XTAL;
;;;121                break;
;;;122            case 2:
;;;123                u32clk = __IRC10K  ;
;;;124                break;
;;;125            case 3:
;;;126                u32clk = u32EXTClockFreq;
;;;127                break;
;;;128            default:
;;;129                u32clk = __IRC12M;    
00003c  4807              LDR      r0,|L48.92|
;;;130        }                
;;;131                    
;;;132        return u32clk;
;;;133    }
00003e  bd10              POP      {r4,pc}
                  |L48.64|
000040  f7fffffe          BL       DrvSYS_GetExtClockFreq
000044  bd10              POP      {r4,pc}
                  |L48.70|
000046  2001              MOVS     r0,#1                 ;120
000048  03c0              LSLS     r0,r0,#15             ;120
00004a  bd10              POP      {r4,pc}
                  |L48.76|
00004c  4804              LDR      r0,|L48.96|
00004e  bd10              POP      {r4,pc}
                  |L48.80|
000050  4804              LDR      r0,|L48.100|
000052  6c00              LDR      r0,[r0,#0x40]         ;126  ; u32EXTClockFreq
000054  bd10              POP      {r4,pc}
;;;134    
                          ENDP

000056  0000              DCW      0x0000
                  |L48.88|
                          DCD      0x50000200
                  |L48.92|
                          DCD      0x00b71b00
                  |L48.96|
                          DCD      0x00002710
                  |L48.100|
                          DCD      ||.data||

                          AREA ||i.NVIC_DisableIRQ||, CODE, READONLY, ALIGN=2

                  NVIC_DisableIRQ PROC
;;;809     */
;;;810    static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
000000  06c1              LSLS     r1,r0,#27
;;;811    {
;;;812      NVIC->ICER[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */
000002  0ec9              LSRS     r1,r1,#27
000004  2001              MOVS     r0,#1
000006  4088              LSLS     r0,r0,r1
000008  4901              LDR      r1,|L49.16|
00000a  6008              STR      r0,[r1,#0]
;;;813    }
00000c  4770              BX       lr
;;;814    
                          ENDP

00000e  0000              DCW      0x0000
                  |L49.16|
                          DCD      0xe000e180

                          AREA ||i.NVIC_EnableIRQ||, CODE, READONLY, ALIGN=2

                  NVIC_EnableIRQ PROC
;;;796     */
;;;797    static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
000000  06c1              LSLS     r1,r0,#27
;;;798    {
;;;799      NVIC->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */
000002  0ec9              LSRS     r1,r1,#27
000004  2001              MOVS     r0,#1
000006  4088              LSLS     r0,r0,r1
000008  4901              LDR      r1,|L50.16|
00000a  6008              STR      r0,[r1,#0]
;;;800    }
00000c  4770              BX       lr
;;;801    
                          ENDP

00000e  0000              DCW      0x0000
                  |L50.16|
                          DCD      0xe000e100

                          AREA ||i.TMR0_IRQHandler||, CODE, READONLY, ALIGN=2

                  TMR0_IRQHandler PROC
;;;180    /*---------------------------------------------------------------------------------------------------------*/
;;;181    void TMR0_IRQHandler(void)
000000  b570              PUSH     {r4-r6,lr}
;;;182    {
;;;183        int32_t i;
;;;184       
;;;185        TIMER0->ISR = 3;
000002  4910              LDR      r1,|L51.68|
000004  2003              MOVS     r0,#3
000006  6108              STR      r0,[r1,#0x10]
;;;186    
;;;187        uTimer0Tick++;
000008  480f              LDR      r0,|L51.72|
00000a  6a01              LDR      r1,[r0,#0x20]  ; uTimer0Tick
00000c  1c49              ADDS     r1,r1,#1
00000e  6201              STR      r1,[r0,#0x20]  ; uTimer0Tick
;;;188        if (bIsSetTime0Event)                       /* Timer Event Handle */
000010  6900              LDR      r0,[r0,#0x10]  ; bIsSetTime0Event
000012  2800              CMP      r0,#0
000014  d014              BEQ      |L51.64|
;;;189        {
;;;190            for (i=0; i<TIMER_EVENT_COUNT; i++)
;;;191            {
;;;192                if (tTime0Event[i].active)
000016  4e0d              LDR      r6,|L51.76|
000018  2500              MOVS     r5,#0                 ;190
                  |L51.26|
00001a  4628              MOV      r0,r5
00001c  2114              MOVS     r1,#0x14
00001e  4348              MULS     r0,r1,r0
000020  5831              LDR      r1,[r6,r0]
000022  2900              CMP      r1,#0
000024  d009              BEQ      |L51.58|
;;;193                {
;;;194                    tTime0Event[i].curTick--;
000026  1984              ADDS     r4,r0,r6
000028  68a0              LDR      r0,[r4,#8]
00002a  1e40              SUBS     r0,r0,#1
;;;195                    if (tTime0Event[i].curTick == 0)
00002c  60a0              STR      r0,[r4,#8]
00002e  d104              BNE      |L51.58|
;;;196                    {
;;;197                        (*tTime0Event[i].funPtr)(tTime0Event[i].transParam);
000030  68e1              LDR      r1,[r4,#0xc]
000032  6920              LDR      r0,[r4,#0x10]
000034  4788              BLX      r1
;;;198                        tTime0Event[i].curTick = tTime0Event[i].initTick;
000036  6860              LDR      r0,[r4,#4]
000038  60a0              STR      r0,[r4,#8]
                  |L51.58|
00003a  1c6d              ADDS     r5,r5,#1              ;190
00003c  2d01              CMP      r5,#1                 ;190
00003e  dbec              BLT      |L51.26|
                  |L51.64|
;;;199                    }
;;;200                }
;;;201            }
;;;202        }
;;;203    }
000040  bd70              POP      {r4-r6,pc}
;;;204    
                          ENDP

000042  0000              DCW      0x0000
                  |L51.68|
                          DCD      0x40010000
                  |L51.72|
                          DCD      ||.data||
                  |L51.76|
                          DCD      ||.bss||

                          AREA ||i.TMR1_IRQHandler||, CODE, READONLY, ALIGN=2

                  TMR1_IRQHandler PROC
;;;214    /*---------------------------------------------------------------------------------------------------------*/
;;;215    void TMR1_IRQHandler(void)
000000  b570              PUSH     {r4-r6,lr}
;;;216    {
;;;217        int32_t i;
;;;218        
;;;219        TIMER1->ISR = 3;
000002  4910              LDR      r1,|L52.68|
000004  2003              MOVS     r0,#3
000006  6108              STR      r0,[r1,#0x10]
;;;220    
;;;221        uTimer1Tick++;
000008  480f              LDR      r0,|L52.72|
00000a  6a41              LDR      r1,[r0,#0x24]  ; uTimer1Tick
00000c  1c49              ADDS     r1,r1,#1
00000e  6241              STR      r1,[r0,#0x24]  ; uTimer1Tick
;;;222        if (bIsSetTime1Event)                       /* Timer Event Handle */
000010  6940              LDR      r0,[r0,#0x14]  ; bIsSetTime1Event
000012  2800              CMP      r0,#0
000014  d014              BEQ      |L52.64|
;;;223        {
;;;224            for (i=0; i<TIMER_EVENT_COUNT; i++)
;;;225            {
;;;226                if (tTime1Event[i].active)
000016  4e0d              LDR      r6,|L52.76|
000018  2500              MOVS     r5,#0                 ;224
                  |L52.26|
00001a  4628              MOV      r0,r5
00001c  2114              MOVS     r1,#0x14
00001e  4348              MULS     r0,r1,r0
000020  5831              LDR      r1,[r6,r0]
000022  2900              CMP      r1,#0
000024  d009              BEQ      |L52.58|
;;;227                {
;;;228                    tTime1Event[i].curTick--;
000026  1984              ADDS     r4,r0,r6
000028  68a0              LDR      r0,[r4,#8]
00002a  1e40              SUBS     r0,r0,#1
;;;229                    if (tTime1Event[i].curTick == 0)
00002c  60a0              STR      r0,[r4,#8]
00002e  d104              BNE      |L52.58|
;;;230                    {
;;;231                        (*tTime1Event[i].funPtr)(tTime1Event[i].transParam);
000030  68e1              LDR      r1,[r4,#0xc]
000032  6920              LDR      r0,[r4,#0x10]
000034  4788              BLX      r1
;;;232                        tTime1Event[i].curTick = tTime1Event[i].initTick;
000036  6860              LDR      r0,[r4,#4]
000038  60a0              STR      r0,[r4,#8]
                  |L52.58|
00003a  1c6d              ADDS     r5,r5,#1              ;224
00003c  2d01              CMP      r5,#1                 ;224
00003e  dbec              BLT      |L52.26|
                  |L52.64|
;;;233                    }
;;;234                }
;;;235            }
;;;236        }
;;;237    }
000040  bd70              POP      {r4-r6,pc}
;;;238    
                          ENDP

000042  0000              DCW      0x0000
                  |L52.68|
                          DCD      0x40010100
                  |L52.72|
                          DCD      ||.data||
                  |L52.76|
                          DCD      ||.bss||+0x14

                          AREA ||i.TMR2_IRQHandler||, CODE, READONLY, ALIGN=2

                  TMR2_IRQHandler PROC
;;;248    /*---------------------------------------------------------------------------------------------------------*/
;;;249    void TMR2_IRQHandler(void)
000000  b570              PUSH     {r4-r6,lr}
;;;250    {
;;;251        int32_t i;
;;;252        
;;;253        TIMER2->ISR = 3;
000002  4910              LDR      r1,|L53.68|
000004  2003              MOVS     r0,#3
000006  6108              STR      r0,[r1,#0x10]
;;;254    
;;;255        uTimer2Tick++;
000008  480f              LDR      r0,|L53.72|
00000a  6a81              LDR      r1,[r0,#0x28]  ; uTimer2Tick
00000c  1c49              ADDS     r1,r1,#1
00000e  6281              STR      r1,[r0,#0x28]  ; uTimer2Tick
;;;256        if (bIsSetTime2Event)                       /* Timer Event Handle */
000010  6980              LDR      r0,[r0,#0x18]  ; bIsSetTime2Event
000012  2800              CMP      r0,#0
000014  d014              BEQ      |L53.64|
;;;257        {
;;;258            for (i=0; i<TIMER_EVENT_COUNT; i++)
;;;259            {
;;;260                if (tTime2Event[i].active)
000016  4e0d              LDR      r6,|L53.76|
000018  2500              MOVS     r5,#0                 ;258
                  |L53.26|
00001a  4628              MOV      r0,r5
00001c  2114              MOVS     r1,#0x14
00001e  4348              MULS     r0,r1,r0
000020  5831              LDR      r1,[r6,r0]
000022  2900              CMP      r1,#0
000024  d009              BEQ      |L53.58|
;;;261                {
;;;262                    tTime2Event[i].curTick--;
000026  1984              ADDS     r4,r0,r6
000028  68a0              LDR      r0,[r4,#8]
00002a  1e40              SUBS     r0,r0,#1
;;;263                    if (tTime2Event[i].curTick == 0)
00002c  60a0              STR      r0,[r4,#8]
00002e  d104              BNE      |L53.58|
;;;264                    {
;;;265                        (*tTime2Event[i].funPtr)(tTime2Event[i].transParam);
000030  68e1              LDR      r1,[r4,#0xc]
000032  6920              LDR      r0,[r4,#0x10]
000034  4788              BLX      r1
;;;266                        tTime2Event[i].curTick = tTime2Event[i].initTick;
000036  6860              LDR      r0,[r4,#4]
000038  60a0              STR      r0,[r4,#8]
                  |L53.58|
00003a  1c6d              ADDS     r5,r5,#1              ;258
00003c  2d01              CMP      r5,#1                 ;258
00003e  dbec              BLT      |L53.26|
                  |L53.64|
;;;267                    }
;;;268                }
;;;269            }
;;;270        }
;;;271    }
000040  bd70              POP      {r4-r6,pc}
;;;272    
                          ENDP

000042  0000              DCW      0x0000
                  |L53.68|
                          DCD      0x40110000
                  |L53.72|
                          DCD      ||.data||
                  |L53.76|
                          DCD      ||.bss||+0x28

                          AREA ||i.TMR3_IRQHandler||, CODE, READONLY, ALIGN=2

                  TMR3_IRQHandler PROC
;;;282    /*---------------------------------------------------------------------------------------------------------*/
;;;283    void TMR3_IRQHandler(void)
000000  b570              PUSH     {r4-r6,lr}
;;;284    {
;;;285        int32_t i;
;;;286        
;;;287        TIMER3->ISR = 3;
000002  4910              LDR      r1,|L54.68|
000004  2003              MOVS     r0,#3
000006  6108              STR      r0,[r1,#0x10]
;;;288    
;;;289        uTimer3Tick++;
000008  480f              LDR      r0,|L54.72|
00000a  6ac1              LDR      r1,[r0,#0x2c]  ; uTimer3Tick
00000c  1c49              ADDS     r1,r1,#1
00000e  62c1              STR      r1,[r0,#0x2c]  ; uTimer3Tick
;;;290        if (bIsSetTime3Event)                       /* Timer Event Handle */
000010  69c0              LDR      r0,[r0,#0x1c]  ; bIsSetTime3Event
000012  2800              CMP      r0,#0
000014  d014              BEQ      |L54.64|
;;;291        {
;;;292            for (i=0; i<TIMER_EVENT_COUNT; i++)
;;;293            {
;;;294                if (tTime3Event[i].active)
000016  4e0d              LDR      r6,|L54.76|
000018  2500              MOVS     r5,#0                 ;292
                  |L54.26|
00001a  4628              MOV      r0,r5
00001c  2114              MOVS     r1,#0x14
00001e  4348              MULS     r0,r1,r0
000020  5831              LDR      r1,[r6,r0]
000022  2900              CMP      r1,#0
000024  d009              BEQ      |L54.58|
;;;295                {
;;;296                    tTime3Event[i].curTick--;
000026  1984              ADDS     r4,r0,r6
000028  68a0              LDR      r0,[r4,#8]
00002a  1e40              SUBS     r0,r0,#1
;;;297                    if (tTime3Event[i].curTick == 0)
00002c  60a0              STR      r0,[r4,#8]
00002e  d104              BNE      |L54.58|
;;;298                    {
;;;299                        (*tTime3Event[i].funPtr)(tTime3Event[i].transParam);
000030  68e1              LDR      r1,[r4,#0xc]
000032  6920              LDR      r0,[r4,#0x10]
000034  4788              BLX      r1
;;;300                        tTime3Event[i].curTick = tTime3Event[i].initTick;
000036  6860              LDR      r0,[r4,#4]
000038  60a0              STR      r0,[r4,#8]
                  |L54.58|
00003a  1c6d              ADDS     r5,r5,#1              ;292
00003c  2d01              CMP      r5,#1                 ;292
00003e  dbec              BLT      |L54.26|
                  |L54.64|
;;;301                    }
;;;302                }
;;;303            }
;;;304        }
;;;305    }
000040  bd70              POP      {r4-r6,pc}
;;;306    
                          ENDP

000042  0000              DCW      0x0000
                  |L54.68|
                          DCD      0x40110100
                  |L54.72|
                          DCD      ||.data||
                  |L54.76|
                          DCD      ||.bss||+0x3c

                          AREA ||i.WDT_IRQHandler||, CODE, READONLY, ALIGN=2

                  WDT_IRQHandler PROC
;;;1554   /*---------------------------------------------------------------------------------------------------------*/
;;;1555   void WDT_IRQHandler(void)
000000  b570              PUSH     {r4-r6,lr}
;;;1556   {
;;;1557   
;;;1558   	uint32_t i;	
;;;1559   
;;;1560   	if((WDT->ISR & 1) && (WDT->IER & 1)) {
000002  4e0f              LDR      r6,|L55.64|
000004  68b0              LDR      r0,[r6,#8]
;;;1561   		i = WDT->ISR;
;;;1562   		if(fnCallBack_WDT != NULL) 
000006  4d0f              LDR      r5,|L55.68|
000008  07c0              LSLS     r0,r0,#31             ;1560
00000a  d009              BEQ      |L55.32|
00000c  6870              LDR      r0,[r6,#4]            ;1560
00000e  07c0              LSLS     r0,r0,#31             ;1560
000010  d006              BEQ      |L55.32|
000012  68b4              LDR      r4,[r6,#8]            ;1561
000014  6da9              LDR      r1,[r5,#0x58]  ; fnCallBack_WDT
000016  2900              CMP      r1,#0
000018  d001              BEQ      |L55.30|
;;;1563   			fnCallBack_WDT(wdt_param);
00001a  6d68              LDR      r0,[r5,#0x54]  ; wdt_param
00001c  4788              BLX      r1
                  |L55.30|
;;;1564   
;;;1565   		WDT->ISR = i;	
00001e  60b4              STR      r4,[r6,#8]
                  |L55.32|
;;;1566   	}
;;;1567   
;;;1568   	if((WWDT->STS & 1) && (WWDT->IER & 1)) {
000020  4c09              LDR      r4,|L55.72|
000022  68e0              LDR      r0,[r4,#0xc]
000024  07c0              LSLS     r0,r0,#31
000026  d009              BEQ      |L55.60|
000028  68a0              LDR      r0,[r4,#8]
00002a  07c0              LSLS     r0,r0,#31
00002c  d006              BEQ      |L55.60|
;;;1569   		if(fnCallBack_WWDT != NULL) 
00002e  6e29              LDR      r1,[r5,#0x60]  ; fnCallBack_WWDT
000030  2900              CMP      r1,#0
000032  d001              BEQ      |L55.56|
;;;1570   			fnCallBack_WWDT(wwdt_param);
000034  6de8              LDR      r0,[r5,#0x5c]  ; wwdt_param
000036  4788              BLX      r1
                  |L55.56|
;;;1571   
;;;1572   		WWDT->STS = 1;	
000038  2001              MOVS     r0,#1
00003a  60e0              STR      r0,[r4,#0xc]
                  |L55.60|
;;;1573   
;;;1574   	}
;;;1575   	
;;;1576   
;;;1577   	return;
;;;1578   }
00003c  bd70              POP      {r4-r6,pc}
;;;1579   
                          ENDP

00003e  0000              DCW      0x0000
                  |L55.64|
                          DCD      0x40004000
                  |L55.68|
                          DCD      ||.data||
                  |L55.72|
                          DCD      0x40004100

                          AREA ||i._getBase||, CODE, READONLY, ALIGN=2

                  _getBase PROC
;;;65     #else
;;;66     static __inline TIMER_TypeDef * _getBase(E_TIMER_CHANNEL ch)
000000  2800              CMP      r0,#0
;;;67     #endif
;;;68     {
;;;69         switch(ch) {
000002  d007              BEQ      |L56.20|
000004  2801              CMP      r0,#1
000006  d007              BEQ      |L56.24|
000008  2802              CMP      r0,#2
00000a  d007              BEQ      |L56.28|
00000c  2803              CMP      r0,#3
00000e  d007              BEQ      |L56.32|
;;;70             case E_TMR0:
;;;71                 return((TIMER_TypeDef *)TIMER0_BASE);
;;;72             case E_TMR1:
;;;73                 return((TIMER_TypeDef *)TIMER1_BASE);
;;;74             case E_TMR2:
;;;75                 return((TIMER_TypeDef *)TIMER2_BASE);
;;;76             case E_TMR3:
;;;77                 return((TIMER_TypeDef *)TIMER3_BASE);               
;;;78         }
;;;79         return(NULL);
000010  2000              MOVS     r0,#0
;;;80     }
000012  4770              BX       lr
                  |L56.20|
000014  4803              LDR      r0,|L56.36|
000016  4770              BX       lr
                  |L56.24|
000018  4803              LDR      r0,|L56.40|
00001a  4770              BX       lr
                  |L56.28|
00001c  4803              LDR      r0,|L56.44|
00001e  4770              BX       lr
                  |L56.32|
000020  4803              LDR      r0,|L56.48|
000022  4770              BX       lr
;;;81     
                          ENDP

                  |L56.36|
                          DCD      0x40010000
                  |L56.40|
                          DCD      0x40010100
                  |L56.44|
                          DCD      0x40110000
                  |L56.48|
                          DCD      0x40110100

                          AREA ||.bss||, DATA, NOINIT, ALIGN=2

                  tTime0Event
                          %        20
                  tTime1Event
                          %        20
                  tTime2Event
                          %        20
                  tTime3Event
                          %        20

                          AREA ||.data||, DATA, ALIGN=2

                  bIsTimer0Used
                          DCD      0x00000000
                  bIsTimer1Used
                          DCD      0x00000000
                  bIsTimer2Used
                          DCD      0x00000000
                  bIsTimer3Used
                          DCD      0x00000000
                  bIsSetTime0Event
                          DCD      0x00000000
                  bIsSetTime1Event
                          DCD      0x00000000
                  bIsSetTime2Event
                          DCD      0x00000000
                  bIsSetTime3Event
                          DCD      0x00000000
                  uTimer0Tick
                          DCD      0x00000000
                  uTimer1Tick
                          DCD      0x00000000
                  uTimer2Tick
                          DCD      0x00000000
                  uTimer3Tick
                          DCD      0x00000000
                  uTime0EventCount
                          DCD      0x00000000
                  uTime1EventCount
                          DCD      0x00000000
                  uTime2EventCount
                          DCD      0x00000000
                  uTime3EventCount
                          DCD      0x00000000
                  u32EXTClockFreq
                          DCD      0x00b71b00
                  _sys_uTimer0TickPerSecond
                          DCD      0x00000000
                  _sys_uTimer1TickPerSecond
                          DCD      0x00000000
                  _sys_uTimer2TickPerSecond
                          DCD      0x00000000
                  _sys_uTimer3TickPerSecond
                          DCD      0x00000000
                  wdt_param
                          DCD      0x00000000
                  fnCallBack_WDT
                          DCD      0x00000000
                  wwdt_param
                          DCD      0x00000000
                  fnCallBack_WWDT
                          DCD      0x00000000

                          AREA ||i.__ARM_common_switch8||, COMGROUP=__ARM_common_switch8, CODE, READONLY, ALIGN=1

                  __ARM_common_switch8 PROC
000000  b430              PUSH     {r4,r5}
000002  4674              MOV      r4,lr
000004  1e64              SUBS     r4,r4,#1
000006  7825              LDRB     r5,[r4,#0]
000008  1c64              ADDS     r4,r4,#1
00000a  42ab              CMP      r3,r5
00000c  d200              BCS      |L340.16|
00000e  461d              MOV      r5,r3
                  |L340.16|
000010  5d63              LDRB     r3,[r4,r5]
000012  005b              LSLS     r3,r3,#1
000014  18e3              ADDS     r3,r4,r3
000016  bc30              POP      {r4,r5}
000018  4718              BX       r3
                          ENDP

