; generated by ARM C/C++ Compiler, 4.1 [Build 894]
; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave -o.\obj\nano1xx_fmc.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\nano1xx_fmc.d --cpu=Cortex-M0 --apcs=interwork -I..\inc -I..\drv -I..\bsp -I..\bsp\Cmsis -I..\bsp\Driver -I..\bsp\system -I..\lib -I..\lib\libtk -IC:\Keil\ARM\RV31\Inc -IC:\Keil\ARM\CMSIS\Include -D__MICROLIB -D__LCDDISPLAY_BTL001_H --omf_browse=.\obj\nano1xx_fmc.crf ..\bsp\Driver\nano1xx_fmc.c]
                          THUMB

                          AREA ||i.FMC_Erase||, CODE, READONLY, ALIGN=2

                  FMC_Erase PROC
;;;81       */
;;;82     int32_t FMC_Erase(uint32_t u32addr)
000000  4909              LDR      r1,|L1.40|
;;;83     {
;;;84     	FMC->ISPCMD = FMC_ISPCMD_PAGE_ERASE;
000002  2222              MOVS     r2,#0x22
000004  60ca              STR      r2,[r1,#0xc]
;;;85         FMC->ISPADR	= u32addr;
000006  6048              STR      r0,[r1,#4]
;;;86     	FMC->ISPTRG = FMC_ISPTRG_ISPGO;	
000008  2001              MOVS     r0,#1
00000a  6108              STR      r0,[r1,#0x10]
                  |L1.12|
;;;87     	
;;;88     	while (FMC->ISPTRG & FMC_ISPTRG_ISPGO) ;
00000c  6908              LDR      r0,[r1,#0x10]
00000e  07c0              LSLS     r0,r0,#31
000010  d1fc              BNE      |L1.12|
;;;89     
;;;90     	if (FMC->ISPCON & FMC_ISPSTA_ISPFF)
000012  6808              LDR      r0,[r1,#0]
000014  0640              LSLS     r0,r0,#25
000016  d504              BPL      |L1.34|
;;;91     	{
;;;92     		FMC->ISPCON = FMC_ISPSTA_ISPFF;
000018  2040              MOVS     r0,#0x40
00001a  6008              STR      r0,[r1,#0]
;;;93     		return E_FMC_ISP_FAIL;
00001c  2000              MOVS     r0,#0
00001e  43c0              MVNS     r0,r0
;;;94     	}
;;;95     	
;;;96     	return E_FMC_OK;
;;;97     }
000020  4770              BX       lr
                  |L1.34|
000022  2000              MOVS     r0,#0                 ;96
000024  4770              BX       lr
;;;98     
                          ENDP

000026  0000              DCW      0x0000
                  |L1.40|
                          DCD      0x5000c000

                          AREA ||i.FMC_Read||, CODE, READONLY, ALIGN=2

                  FMC_Read PROC
;;;56       */
;;;57     int32_t FMC_Read(uint32_t u32addr, uint32_t * u32data)
000000  4a0a              LDR      r2,|L2.44|
;;;58     { 
;;;59     	FMC->ISPCMD = FMC_ISPCMD_READ;
000002  2300              MOVS     r3,#0
000004  60d3              STR      r3,[r2,#0xc]
;;;60         FMC->ISPADR	= u32addr;
000006  6050              STR      r0,[r2,#4]
;;;61     	FMC->ISPTRG = FMC_ISPTRG_ISPGO;	
000008  2001              MOVS     r0,#1
00000a  6110              STR      r0,[r2,#0x10]
                  |L2.12|
;;;62     	
;;;63     	while (FMC->ISPTRG & FMC_ISPTRG_ISPGO) ;
00000c  6910              LDR      r0,[r2,#0x10]
00000e  07c0              LSLS     r0,r0,#31
000010  d1fc              BNE      |L2.12|
;;;64     
;;;65     	if (FMC->ISPCON & FMC_ISPSTA_ISPFF)
000012  6810              LDR      r0,[r2,#0]
000014  0640              LSLS     r0,r0,#25
000016  d504              BPL      |L2.34|
;;;66     	{
;;;67     		FMC->ISPCON = FMC_ISPSTA_ISPFF;
000018  2040              MOVS     r0,#0x40
00001a  6010              STR      r0,[r2,#0]
;;;68     		return E_FMC_ISP_FAIL;
00001c  2000              MOVS     r0,#0
00001e  43c0              MVNS     r0,r0
;;;69     	}
;;;70     	
;;;71     	*u32data = FMC->ISPDAT;
;;;72     	return E_FMC_OK;
;;;73     }
000020  4770              BX       lr
                  |L2.34|
000022  6890              LDR      r0,[r2,#8]            ;71
000024  6008              STR      r0,[r1,#0]            ;72
000026  2000              MOVS     r0,#0                 ;72
000028  4770              BX       lr
;;;74     
                          ENDP

00002a  0000              DCW      0x0000
                  |L2.44|
                          DCD      0x5000c000

                          AREA ||i.FMC_ReadCID||, CODE, READONLY, ALIGN=2

                  FMC_ReadCID PROC
;;;134      */
;;;135    int32_t FMC_ReadCID(uint32_t * u32data)
000000  490a              LDR      r1,|L3.44|
;;;136    {
;;;137    	FMC->ISPCMD = FMC_ISPCMD_READ_CID;
000002  220b              MOVS     r2,#0xb
000004  60ca              STR      r2,[r1,#0xc]
;;;138    	FMC->ISPADR	= 0;
000006  2200              MOVS     r2,#0
000008  604a              STR      r2,[r1,#4]
;;;139    	FMC->ISPTRG = FMC_ISPTRG_ISPGO;	
00000a  2201              MOVS     r2,#1
00000c  610a              STR      r2,[r1,#0x10]
                  |L3.14|
;;;140    	
;;;141    	while (FMC->ISPTRG & FMC_ISPTRG_ISPGO) ;
00000e  690a              LDR      r2,[r1,#0x10]
000010  07d2              LSLS     r2,r2,#31
000012  d1fc              BNE      |L3.14|
;;;142    
;;;143    	if (FMC->ISPCON & FMC_ISPSTA_ISPFF)
000014  680a              LDR      r2,[r1,#0]
000016  0652              LSLS     r2,r2,#25
000018  d504              BPL      |L3.36|
;;;144    	{
;;;145    		FMC->ISPCON = FMC_ISPSTA_ISPFF;
00001a  2040              MOVS     r0,#0x40
00001c  6008              STR      r0,[r1,#0]
;;;146    		return E_FMC_ISP_FAIL;
00001e  2000              MOVS     r0,#0
000020  43c0              MVNS     r0,r0
;;;147    	}
;;;148        
;;;149    	*u32data = FMC->ISPDAT; 
;;;150        return E_FMC_OK;
;;;151    }
000022  4770              BX       lr
                  |L3.36|
000024  6889              LDR      r1,[r1,#8]            ;149
000026  6001              STR      r1,[r0,#0]            ;150
000028  2000              MOVS     r0,#0                 ;150
00002a  4770              BX       lr
;;;152    
                          ENDP

                  |L3.44|
                          DCD      0x5000c000

                          AREA ||i.FMC_ReadDID||, CODE, READONLY, ALIGN=2

                  FMC_ReadDID PROC
;;;159      */
;;;160    int32_t FMC_ReadDID(uint32_t * u32data)
000000  490a              LDR      r1,|L4.44|
;;;161    {
;;;162    	FMC->ISPCMD = FMC_ISPCMD_READ_DID;
000002  220c              MOVS     r2,#0xc
000004  60ca              STR      r2,[r1,#0xc]
;;;163    	FMC->ISPADR	= 0;
000006  2200              MOVS     r2,#0
000008  604a              STR      r2,[r1,#4]
;;;164    	FMC->ISPTRG = FMC_ISPTRG_ISPGO;	
00000a  2201              MOVS     r2,#1
00000c  610a              STR      r2,[r1,#0x10]
                  |L4.14|
;;;165    	
;;;166    	while (FMC->ISPTRG & FMC_ISPTRG_ISPGO) ;
00000e  690a              LDR      r2,[r1,#0x10]
000010  07d2              LSLS     r2,r2,#31
000012  d1fc              BNE      |L4.14|
;;;167    
;;;168    	if (FMC->ISPCON & FMC_ISPSTA_ISPFF)
000014  680a              LDR      r2,[r1,#0]
000016  0652              LSLS     r2,r2,#25
000018  d504              BPL      |L4.36|
;;;169    	{
;;;170    		FMC->ISPCON = FMC_ISPSTA_ISPFF;
00001a  2040              MOVS     r0,#0x40
00001c  6008              STR      r0,[r1,#0]
;;;171    		return E_FMC_ISP_FAIL;
00001e  2000              MOVS     r0,#0
000020  43c0              MVNS     r0,r0
;;;172    	}
;;;173        
;;;174    	*u32data = FMC->ISPDAT; 
;;;175        return E_FMC_OK;
;;;176    }
000022  4770              BX       lr
                  |L4.36|
000024  6889              LDR      r1,[r1,#8]            ;174
000026  6001              STR      r1,[r0,#0]            ;175
000028  2000              MOVS     r0,#0                 ;175
00002a  4770              BX       lr
;;;177    
                          ENDP

                  |L4.44|
                          DCD      0x5000c000

                          AREA ||i.FMC_ReadPID||, CODE, READONLY, ALIGN=2

                  FMC_ReadPID PROC
;;;184      */
;;;185    int32_t FMC_ReadPID(uint32_t * u32data)
000000  490a              LDR      r1,|L5.44|
;;;186    {
;;;187    	FMC->ISPCMD = FMC_ISPCMD_READ_DID;
000002  220c              MOVS     r2,#0xc
000004  60ca              STR      r2,[r1,#0xc]
;;;188    	FMC->ISPADR	= 0x04;
000006  2204              MOVS     r2,#4
000008  604a              STR      r2,[r1,#4]
;;;189    	FMC->ISPTRG = FMC_ISPTRG_ISPGO;	
00000a  2201              MOVS     r2,#1
00000c  610a              STR      r2,[r1,#0x10]
                  |L5.14|
;;;190    	
;;;191    	while (FMC->ISPTRG & FMC_ISPTRG_ISPGO) ;
00000e  690a              LDR      r2,[r1,#0x10]
000010  07d2              LSLS     r2,r2,#31
000012  d1fc              BNE      |L5.14|
;;;192    
;;;193    	if (FMC->ISPCON & FMC_ISPSTA_ISPFF)
000014  680a              LDR      r2,[r1,#0]
000016  0652              LSLS     r2,r2,#25
000018  d504              BPL      |L5.36|
;;;194    	{
;;;195    		FMC->ISPCON = FMC_ISPSTA_ISPFF;
00001a  2040              MOVS     r0,#0x40
00001c  6008              STR      r0,[r1,#0]
;;;196    		return E_FMC_ISP_FAIL;
00001e  2000              MOVS     r0,#0
000020  43c0              MVNS     r0,r0
;;;197    	}
;;;198        
;;;199    	*u32data = FMC->ISPDAT; 
;;;200        return E_FMC_OK;
;;;201    }
000022  4770              BX       lr
                  |L5.36|
000024  6889              LDR      r1,[r1,#8]            ;199
000026  6001              STR      r1,[r0,#0]            ;200
000028  2000              MOVS     r0,#0                 ;200
00002a  4770              BX       lr
;;;202    
                          ENDP

                  |L5.44|
                          DCD      0x5000c000

                          AREA ||i.FMC_ReadUID||, CODE, READONLY, ALIGN=2

                  FMC_ReadUID PROC
;;;211      */
;;;212    int32_t FMC_ReadUID(int index, uint32_t * u32data)
000000  2803              CMP      r0,#3
;;;213    {
;;;214    	if ((index < 0) || (index > 2))
000002  d302              BCC      |L6.10|
;;;215    		return E_FMC_INVALID_PARAM;
000004  2002              MOVS     r0,#2
000006  43c0              MVNS     r0,r0
;;;216    	
;;;217    	FMC->ISPCMD = FMC_ISPCMD_READ_UID;
;;;218    	FMC->ISPADR	= 0x04 * index;
;;;219    	FMC->ISPTRG = FMC_ISPTRG_ISPGO;	
;;;220    	
;;;221    	while (FMC->ISPTRG & FMC_ISPTRG_ISPGO) ;
;;;222    
;;;223    	if (FMC->ISPCON & FMC_ISPSTA_ISPFF)
;;;224    	{
;;;225    		FMC->ISPCON = FMC_ISPSTA_ISPFF;
;;;226    		return E_FMC_ISP_FAIL;
;;;227    	}
;;;228        
;;;229    	*u32data = FMC->ISPDAT; 
;;;230        return E_FMC_OK;
;;;231    }
000008  4770              BX       lr
                  |L6.10|
00000a  4a0b              LDR      r2,|L6.56|
00000c  2304              MOVS     r3,#4                 ;217
00000e  60d3              STR      r3,[r2,#0xc]          ;217
000010  0080              LSLS     r0,r0,#2              ;218
000012  6050              STR      r0,[r2,#4]            ;218
000014  2001              MOVS     r0,#1                 ;219
000016  6110              STR      r0,[r2,#0x10]         ;219
                  |L6.24|
000018  6910              LDR      r0,[r2,#0x10]         ;221
00001a  07c0              LSLS     r0,r0,#31             ;221
00001c  d1fc              BNE      |L6.24|
00001e  6810              LDR      r0,[r2,#0]            ;223
000020  0640              LSLS     r0,r0,#25             ;223
000022  d504              BPL      |L6.46|
000024  2040              MOVS     r0,#0x40              ;225
000026  6010              STR      r0,[r2,#0]            ;225
000028  2000              MOVS     r0,#0                 ;226
00002a  43c0              MVNS     r0,r0                 ;226
00002c  4770              BX       lr
                  |L6.46|
00002e  6890              LDR      r0,[r2,#8]            ;229
000030  6008              STR      r0,[r1,#0]            ;230
000032  2000              MOVS     r0,#0                 ;230
000034  4770              BX       lr
;;;232    
                          ENDP

000036  0000              DCW      0x0000
                  |L6.56|
                          DCD      0x5000c000

                          AREA ||i.FMC_SetVectorPage||, CODE, READONLY, ALIGN=2

                  FMC_SetVectorPage PROC
;;;107      */
;;;108    int32_t FMC_SetVectorPage(uint32_t u32addr)
000000  2800              CMP      r0,#0
;;;109    {
;;;110    	if ((u32addr != 0) && (u32addr != 0x100000))
000002  d006              BEQ      |L7.18|
000004  2101              MOVS     r1,#1
000006  0509              LSLS     r1,r1,#20
000008  4288              CMP      r0,r1
00000a  d002              BEQ      |L7.18|
;;;111    		return E_FMC_INVALID_ADDR;
00000c  2001              MOVS     r0,#1
00000e  43c0              MVNS     r0,r0
;;;112    	
;;;113    	FMC->ISPCMD = FMC_ISPCMD_VECMAP;
;;;114        FMC->ISPADR	= u32addr;
;;;115    	FMC->ISPTRG = FMC_ISPTRG_ISPGO;	
;;;116    	
;;;117    	while (FMC->ISPTRG & FMC_ISPTRG_ISPGO) ;
;;;118    
;;;119    	if (FMC->ISPCON & FMC_ISPSTA_ISPFF)
;;;120    	{
;;;121    		FMC->ISPCON = FMC_ISPSTA_ISPFF;
;;;122    		return E_FMC_ISP_FAIL;
;;;123    	}
;;;124    
;;;125    	return E_FMC_OK;
;;;126    }
000010  4770              BX       lr
                  |L7.18|
000012  4909              LDR      r1,|L7.56|
000014  222e              MOVS     r2,#0x2e              ;113
000016  60ca              STR      r2,[r1,#0xc]          ;113
000018  6048              STR      r0,[r1,#4]            ;114
00001a  2001              MOVS     r0,#1                 ;115
00001c  6108              STR      r0,[r1,#0x10]         ;115
                  |L7.30|
00001e  6908              LDR      r0,[r1,#0x10]         ;117
000020  07c0              LSLS     r0,r0,#31             ;117
000022  d1fc              BNE      |L7.30|
000024  6808              LDR      r0,[r1,#0]            ;119
000026  0640              LSLS     r0,r0,#25             ;119
000028  d504              BPL      |L7.52|
00002a  2040              MOVS     r0,#0x40              ;121
00002c  6008              STR      r0,[r1,#0]            ;121
00002e  2000              MOVS     r0,#0                 ;122
000030  43c0              MVNS     r0,r0                 ;122
000032  4770              BX       lr
                  |L7.52|
000034  2000              MOVS     r0,#0                 ;125
000036  4770              BX       lr
;;;127    
                          ENDP

                  |L7.56|
                          DCD      0x5000c000

                          AREA ||i.FMC_Write||, CODE, READONLY, ALIGN=2

                  FMC_Write PROC
;;;30       */
;;;31     int32_t FMC_Write(uint32_t u32addr, uint32_t u32data)
000000  4a09              LDR      r2,|L8.40|
;;;32     {
;;;33     	FMC->ISPCMD = FMC_ISPCMD_PROGRAM;
000002  2321              MOVS     r3,#0x21
000004  60d3              STR      r3,[r2,#0xc]
;;;34         FMC->ISPADR	= u32addr;
000006  6050              STR      r0,[r2,#4]
;;;35     	FMC->ISPDAT	= u32data;
000008  6091              STR      r1,[r2,#8]
;;;36     	FMC->ISPTRG = FMC_ISPTRG_ISPGO;	
00000a  2001              MOVS     r0,#1
00000c  6110              STR      r0,[r2,#0x10]
                  |L8.14|
;;;37     	
;;;38     	while (FMC->ISPTRG & FMC_ISPTRG_ISPGO) ;
00000e  6910              LDR      r0,[r2,#0x10]
000010  07c0              LSLS     r0,r0,#31
000012  d1fc              BNE      |L8.14|
;;;39     
;;;40     	if (FMC->ISPCON & FMC_ISPSTA_ISPFF)
000014  6810              LDR      r0,[r2,#0]
000016  0640              LSLS     r0,r0,#25
000018  d504              BPL      |L8.36|
;;;41     	{
;;;42     		FMC->ISPCON = FMC_ISPSTA_ISPFF;
00001a  2040              MOVS     r0,#0x40
00001c  6010              STR      r0,[r2,#0]
;;;43     		return E_FMC_ISP_FAIL;
00001e  2000              MOVS     r0,#0
000020  43c0              MVNS     r0,r0
;;;44     	}
;;;45     	
;;;46     	return E_FMC_OK;
;;;47     }
000022  4770              BX       lr
                  |L8.36|
000024  2000              MOVS     r0,#0                 ;46
000026  4770              BX       lr
;;;48     
                          ENDP

                  |L8.40|
                          DCD      0x5000c000

                          AREA ||i.FMC_WriteConfig||, CODE, READONLY, ALIGN=2

                  FMC_WriteConfig PROC
;;;241      */
;;;242    int32_t FMC_WriteConfig(uint32_t u32data0, uint32_t u32data1)
000000  b570              PUSH     {r4-r6,lr}
;;;243    {		
;;;244    	if (FMC_Erase(CONFIG0))
000002  2303              MOVS     r3,#3
000004  4606              MOV      r6,r0                 ;243
000006  051b              LSLS     r3,r3,#20
000008  460d              MOV      r5,r1                 ;243
00000a  4618              MOV      r0,r3
00000c  f7fffffe          BL       FMC_Erase
;;;245    		return E_FMC_ISP_FAIL;
000010  2400              MOVS     r4,#0
000012  43e4              MVNS     r4,r4
000014  2800              CMP      r0,#0                 ;244
000016  d105              BNE      |L9.36|
;;;246    	
;;;247    	if (FMC_Write(CONFIG0, u32data0))
000018  4631              MOV      r1,r6
00001a  4618              MOV      r0,r3
00001c  f7fffffe          BL       FMC_Write
000020  2800              CMP      r0,#0
000022  d001              BEQ      |L9.40|
                  |L9.36|
;;;248    		return E_FMC_ISP_FAIL;
000024  4620              MOV      r0,r4
;;;249    
;;;250    	return FMC_Write(CONFIG1, u32data1);
;;;251    }
000026  bd70              POP      {r4-r6,pc}
                  |L9.40|
000028  4629              MOV      r1,r5                 ;250
00002a  4802              LDR      r0,|L9.52|
00002c  f7fffffe          BL       FMC_Write
000030  bd70              POP      {r4-r6,pc}
;;;252    
                          ENDP

000032  0000              DCW      0x0000
                  |L9.52|
                          DCD      0x00300004

;*** Start embedded assembler ***

#line 1 "..\\bsp\\Driver\\nano1xx_fmc.c"
	AREA ||.rev16_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___13_nano1xx_fmc_c_0baace9f____REV16|
#line 115 "C:\\Keil\\ARM\\CMSIS\\Include\\core_cmInstr.h"
|__asm___13_nano1xx_fmc_c_0baace9f____REV16| PROC
#line 116

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___13_nano1xx_fmc_c_0baace9f____REVSH|
#line 130
|__asm___13_nano1xx_fmc_c_0baace9f____REVSH| PROC
#line 131

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
