; generated by ARM C/C++ Compiler, 4.1 [Build 894]
; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave -o.\obj\nano1xx_i2s.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\nano1xx_i2s.d --cpu=Cortex-M0 --apcs=interwork -I..\inc -I..\drv -I..\bsp -I..\bsp\Cmsis -I..\bsp\Driver -I..\bsp\system -I..\lib -I..\lib\libtk -IC:\Keil\ARM\RV31\Inc -IC:\Keil\ARM\CMSIS\Include -D__MICROLIB -D__LCDDISPLAY_BTL001_H --omf_browse=.\obj\nano1xx_i2s.crf ..\bsp\Driver\nano1xx_i2s.c]
                          THUMB

                          AREA ||i.I2S_Close||, CODE, READONLY, ALIGN=2

                  I2S_Close PROC
;;;85       */
;;;86     void I2S_Close(void)
000000  4804              LDR      r0,|L1.20|
;;;87     {
;;;88     	I2S->CTRL &= ~I2S_CON_I2SEN;
000002  6801              LDR      r1,[r0,#0]
000004  0849              LSRS     r1,r1,#1
000006  0049              LSLS     r1,r1,#1
000008  6001              STR      r1,[r0,#0]
00000a  2001              MOVS     r0,#1
00000c  4902              LDR      r1,|L1.24|
00000e  06c0              LSLS     r0,r0,#27
000010  6008              STR      r0,[r1,#0]
;;;89     	
;;;90     	NVIC_DisableIRQ(I2S_IRQn);	
;;;91     }
000012  4770              BX       lr
;;;92     
                          ENDP

                  |L1.20|
                          DCD      0x401a0000
                  |L1.24|
                          DCD      0xe000e180

                          AREA ||i.I2S_GetBCLKFreq||, CODE, READONLY, ALIGN=2

                  I2S_GetBCLKFreq PROC
;;;97       */
;;;98     uint32_t I2S_GetBCLKFreq(void)
000000  b510              PUSH     {r4,lr}
;;;99     {
;;;100    	uint32_t u32Reg, u32SrcClk;
;;;101    	
;;;102    	u32SrcClk = I2S_GetSourceClockFreq(); 			
000002  f7fffffe          BL       I2S_GetSourceClockFreq
;;;103    	u32Reg = (I2S->CLKDIV & I2S_CLKDIV_BCLK_DIV_MASK) >> 8;
000006  4904              LDR      r1,|L2.24|
000008  6849              LDR      r1,[r1,#4]
;;;104    	
;;;105    	return ((u32SrcClk >> 1) / (u32Reg + 1));
00000a  0840              LSRS     r0,r0,#1
00000c  0409              LSLS     r1,r1,#16             ;103
00000e  0e09              LSRS     r1,r1,#24             ;103
000010  1c49              ADDS     r1,r1,#1
000012  f7fffffe          BL       __aeabi_uidivmod
;;;106    }
000016  bd10              POP      {r4,pc}
;;;107    
                          ENDP

                  |L2.24|
                          DCD      0x401a0000

                          AREA ||i.I2S_GetMCLKFreq||, CODE, READONLY, ALIGN=2

                  I2S_GetMCLKFreq PROC
;;;128      */
;;;129    uint32_t I2S_GetMCLKFreq(void)
000000  b510              PUSH     {r4,lr}
;;;130    {
;;;131    	uint32_t u32Reg, u32SrcClk;
;;;132    
;;;133    	u32Reg = I2S->CLKDIV & I2S_CLKDIV_MCLK_DIV_MASK;
000002  4806              LDR      r0,|L3.28|
000004  6840              LDR      r0,[r0,#4]
000006  0744              LSLS     r4,r0,#29
000008  0f64              LSRS     r4,r4,#29
;;;134    
;;;135    	u32SrcClk = I2S_GetSourceClockFreq(); 
00000a  f7fffffe          BL       I2S_GetSourceClockFreq
;;;136    	
;;;137    	if (u32Reg == 0)
00000e  2c00              CMP      r4,#0
000010  d003              BEQ      |L3.26|
;;;138    		return u32SrcClk;
;;;139    	else
;;;140    		return ((u32SrcClk >> 1) / u32Reg);
000012  0840              LSRS     r0,r0,#1
000014  4621              MOV      r1,r4
000016  f7fffffe          BL       __aeabi_uidivmod
                  |L3.26|
;;;141    }
00001a  bd10              POP      {r4,pc}
;;;142    
                          ENDP

                  |L3.28|
                          DCD      0x401a0000

                          AREA ||i.I2S_GetSourceClockFreq||, CODE, READONLY, ALIGN=2

                  I2S_GetSourceClockFreq PROC
;;;166      */
;;;167    uint32_t I2S_GetSourceClockFreq(void)
000000  b510              PUSH     {r4,lr}
;;;168    {	
;;;169    	uint32_t u32Freq, u32Div, u32ClkSrcSel;;
;;;170    	
;;;171    	// get I2S selection clock source
;;;172    	u32ClkSrcSel = CLK->CLKSEL2 & CLK_CLKSEL2_I2S_MASK;
000002  4c09              LDR      r4,|L4.40|
000004  69a1              LDR      r1,[r4,#0x18]
000006  2003              MOVS     r0,#3
000008  0400              LSLS     r0,r0,#16
00000a  4001              ANDS     r1,r1,r0
00000c  4807              LDR      r0,|L4.44|
;;;173    	
;;;174    	switch (u32ClkSrcSel)
00000e  d004              BEQ      |L4.26|
000010  01e2              LSLS     r2,r4,#7
000012  1a89              SUBS     r1,r1,r2
000014  d101              BNE      |L4.26|
;;;175    	{
;;;176    		case CLK_CLKSEL2_I2S_HXT:
;;;177    			u32Freq = SYS_GetExtClockFreq();
;;;178    			break;
;;;179    		
;;;180    		case CLK_CLKSEL2_I2S_PLL:
;;;181    			u32Freq = SYS_GetPLLClockFreq();					
000016  f7fffffe          BL       SYS_GetPLLClockFreq
                  |L4.26|
;;;182    			break;
;;;183    		
;;;184    		case CLK_CLKSEL2_I2S_HIRC:
;;;185    			u32Freq = __IRC12M;
;;;186    			break;	
;;;187    		
;;;188    		default: 
;;;189    			u32Freq = __IRC12M;
;;;190    			break;	
;;;191    	}
;;;192    	
;;;193    	u32Div = (CLK->CLKDIV0 & CLK_CLKDIV0_I2S_MASK) >> 12;
00001a  69e1              LDR      r1,[r4,#0x1c]
00001c  0409              LSLS     r1,r1,#16
00001e  0f09              LSRS     r1,r1,#28
;;;194    	u32Div++;
000020  1c49              ADDS     r1,r1,#1
;;;195    	u32Freq /= u32Div;	
000022  f7fffffe          BL       __aeabi_uidivmod
;;;196    
;;;197    	return u32Freq;
;;;198    }
000026  bd10              POP      {r4,pc}
;;;199    
                          ENDP

                  |L4.40|
                          DCD      0x50000200
                  |L4.44|
                          DCD      0x00b71b00

                          AREA ||i.I2S_Open||, CODE, READONLY, ALIGN=2

                  I2S_Open PROC
;;;55       */
;;;56     int32_t I2S_Open(I2S_DATA_T *sParam)
000000  b570              PUSH     {r4-r6,lr}
;;;57     {
000002  4604              MOV      r4,r0
;;;58     	uint8_t u8Divider;
;;;59     	uint32_t u32BitRate, u32SrcClk;
;;;60     	
;;;61     	GCR->IPRST_CTL2 |= GCR_IPRSTCTL2_I2S;
000004  2005              MOVS     r0,#5
000006  0700              LSLS     r0,r0,#28
000008  68c2              LDR      r2,[r0,#0xc]
00000a  2101              MOVS     r1,#1
00000c  0749              LSLS     r1,r1,#29
00000e  430a              ORRS     r2,r2,r1
000010  60c2              STR      r2,[r0,#0xc]
;;;62     	GCR->IPRST_CTL2 &= ~GCR_IPRSTCTL2_I2S;
000012  68c2              LDR      r2,[r0,#0xc]
000014  438a              BICS     r2,r2,r1
000016  60c2              STR      r2,[r0,#0xc]
;;;63     				
;;;64     	I2S->CTRL = (sParam->u32WordWidth | sParam->u32AudioFormat | sParam->u32DataFormat | sParam->u32Mode |sParam->u32TxFIFOThreshold | sParam->u32RxFIFOThreshold) ;
000018  68a1              LDR      r1,[r4,#8]
00001a  6860              LDR      r0,[r4,#4]
00001c  6922              LDR      r2,[r4,#0x10]
00001e  4308              ORRS     r0,r0,r1
000020  68e1              LDR      r1,[r4,#0xc]
000022  4d11              LDR      r5,|L5.104|
000024  4311              ORRS     r1,r1,r2
000026  4308              ORRS     r0,r0,r1
000028  6961              LDR      r1,[r4,#0x14]
00002a  4308              ORRS     r0,r0,r1
00002c  69a1              LDR      r1,[r4,#0x18]
00002e  4308              ORRS     r0,r0,r1
000030  6028              STR      r0,[r5,#0]
;;;65     
;;;66     	u32SrcClk = I2S_GetSourceClockFreq();	
000032  f7fffffe          BL       I2S_GetSourceClockFreq
;;;67     	
;;;68     	u32BitRate = sParam->u32SampleRate * (sParam->u32WordWidth + 1) * 16;
000036  cc06              LDM      r4!,{r1,r2}
000038  1c52              ADDS     r2,r2,#1
00003a  4351              MULS     r1,r2,r1
00003c  0109              LSLS     r1,r1,#4
;;;69     
;;;70     	u8Divider = ((u32SrcClk/u32BitRate) >> 1) - 1;
00003e  f7fffffe          BL       __aeabi_uidivmod
000042  0840              LSRS     r0,r0,#1
000044  1e40              SUBS     r0,r0,#1
;;;71     	
;;;72     	I2S->CLKDIV = (I2S->CLKDIV & ~I2S_CLKDIV_BCLK_DIV_MASK) | (u8Divider << 8);	
000046  6869              LDR      r1,[r5,#4]
000048  0600              LSLS     r0,r0,#24             ;70
00004a  22ff              MOVS     r2,#0xff
00004c  0212              LSLS     r2,r2,#8
00004e  4391              BICS     r1,r1,r2
000050  0c00              LSRS     r0,r0,#16
000052  4301              ORRS     r1,r1,r0
000054  6069              STR      r1,[r5,#4]
;;;73     	
;;;74     	I2S->CTRL |= I2S_CON_I2SEN;	
000056  6828              LDR      r0,[r5,#0]
000058  2101              MOVS     r1,#1
00005a  4308              ORRS     r0,r0,r1
00005c  6028              STR      r0,[r5,#0]
00005e  06c8              LSLS     r0,r1,#27
000060  4902              LDR      r1,|L5.108|
000062  6008              STR      r0,[r1,#0]
;;;75     	
;;;76     	NVIC_EnableIRQ(I2S_IRQn);
;;;77     	
;;;78     	return E_SUCCESS;
000064  2000              MOVS     r0,#0
;;;79     }
000066  bd70              POP      {r4-r6,pc}
;;;80     
                          ENDP

                  |L5.104|
                          DCD      0x401a0000
                  |L5.108|
                          DCD      0xe000e100

                          AREA ||i.I2S_SetBCLKFreq||, CODE, READONLY, ALIGN=2

                  I2S_SetBCLKFreq PROC
;;;112      */
;;;113    void I2S_SetBCLKFreq(uint32_t u32Bclk)
000000  b510              PUSH     {r4,lr}
;;;114    {
000002  4604              MOV      r4,r0
;;;115    	uint8_t u8Divider;
;;;116    	uint32_t u32SrcClk;
;;;117    
;;;118    	u32SrcClk = I2S_GetSourceClockFreq(); 	
000004  f7fffffe          BL       I2S_GetSourceClockFreq
;;;119    	u8Divider = ((u32SrcClk/u32Bclk) >> 1) - 1;
000008  4621              MOV      r1,r4
00000a  f7fffffe          BL       __aeabi_uidivmod
;;;120    
;;;121    	I2S->CLKDIV |= ((u8Divider << 8) & I2S_CLKDIV_BCLK_DIV_MASK);
00000e  4904              LDR      r1,|L6.32|
000010  0840              LSRS     r0,r0,#1              ;119
000012  1e40              SUBS     r0,r0,#1              ;119
000014  684a              LDR      r2,[r1,#4]
000016  0600              LSLS     r0,r0,#24             ;119
000018  0c00              LSRS     r0,r0,#16
00001a  4302              ORRS     r2,r2,r0
00001c  604a              STR      r2,[r1,#4]
;;;122    }
00001e  bd10              POP      {r4,pc}
;;;123    
                          ENDP

                  |L6.32|
                          DCD      0x401a0000

                          AREA ||i.I2S_SetMCLKFreq||, CODE, READONLY, ALIGN=2

                  I2S_SetMCLKFreq PROC
;;;147      */
;;;148    void I2S_SetMCLKFreq(uint32_t u32Mclk)
000000  b510              PUSH     {r4,lr}
;;;149    {
000002  4604              MOV      r4,r0
;;;150    	uint8_t u8Divider;
;;;151    	uint32_t u32SrcClk;
;;;152    
;;;153    	u32SrcClk = I2S_GetSourceClockFreq(); 
000004  f7fffffe          BL       I2S_GetSourceClockFreq
;;;154    	if (u32Mclk == u32SrcClk)
000008  4284              CMP      r4,r0
00000a  d101              BNE      |L7.16|
;;;155    		u8Divider = 0;
00000c  2000              MOVS     r0,#0
00000e  e004              B        |L7.26|
                  |L7.16|
;;;156    	else
;;;157    		u8Divider = (u32SrcClk/u32Mclk) >> 1;
000010  4621              MOV      r1,r4
000012  f7fffffe          BL       __aeabi_uidivmod
000016  05c0              LSLS     r0,r0,#23
000018  0e00              LSRS     r0,r0,#24
                  |L7.26|
;;;158    	
;;;159    	I2S->CLKDIV |= (u8Divider & I2S_CLKDIV_MCLK_DIV_MASK);
00001a  4903              LDR      r1,|L7.40|
00001c  684a              LDR      r2,[r1,#4]
00001e  0740              LSLS     r0,r0,#29
000020  0f40              LSRS     r0,r0,#29
000022  4302              ORRS     r2,r2,r0
000024  604a              STR      r2,[r1,#4]
;;;160    }
000026  bd10              POP      {r4,pc}
;;;161    
                          ENDP

                  |L7.40|
                          DCD      0x401a0000

;*** Start embedded assembler ***

#line 1 "..\\bsp\\Driver\\nano1xx_i2s.c"
	AREA ||.rev16_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___13_nano1xx_i2s_c_I2S_Open____REV16|
#line 115 "C:\\Keil\\ARM\\CMSIS\\Include\\core_cmInstr.h"
|__asm___13_nano1xx_i2s_c_I2S_Open____REV16| PROC
#line 116

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___13_nano1xx_i2s_c_I2S_Open____REVSH|
#line 130
|__asm___13_nano1xx_i2s_c_I2S_Open____REVSH| PROC
#line 131

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
