; generated by ARM C/C++ Compiler, 4.1 [Build 894]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\obj\fmc.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\fmc.d --cpu=Cortex-M0 --apcs=interwork -I..\..\..\..\Library\Device\Nuvoton\Nano1X2Series\Include -I..\..\..\..\Library\StdDriver\inc -I..\..\..\..\Library\CMSIS\Include -IC:\Keil\ARM\RV31\Inc -IC:\Keil\ARM\CMSIS\Include -D__MICROLIB --omf_browse=.\obj\fmc.crf ..\..\..\..\Library\StdDriver\src\fmc.c]
                          THUMB

                          AREA ||i.FMC_Close||, CODE, READONLY, ALIGN=2

                  FMC_Close PROC
;;;51       */
;;;52     void FMC_Close(void)
000000  4802              LDR      r0,|L1.12|
;;;53     {
;;;54         FMC->ISPCON &= ~FMC_ISPCON_ISPEN_Msk;
000002  6801              LDR      r1,[r0,#0]
000004  0849              LSRS     r1,r1,#1
000006  0049              LSLS     r1,r1,#1
000008  6001              STR      r1,[r0,#0]
;;;55     }
00000a  4770              BX       lr
;;;56     
                          ENDP

                  |L1.12|
                          DCD      0x5000c000

                          AREA ||i.FMC_DisableAPUpdate||, CODE, READONLY, ALIGN=2

                  FMC_DisableAPUpdate PROC
;;;61       */
;;;62     void FMC_DisableAPUpdate(void)
000000  4802              LDR      r0,|L2.12|
;;;63     {
;;;64         FMC->ISPCON &= ~FMC_ISPCON_APUEN_Msk;
000002  6801              LDR      r1,[r0,#0]
000004  2208              MOVS     r2,#8
000006  4391              BICS     r1,r1,r2
000008  6001              STR      r1,[r0,#0]
;;;65     }
00000a  4770              BX       lr
;;;66     
                          ENDP

                  |L2.12|
                          DCD      0x5000c000

                          AREA ||i.FMC_DisableConfigUpdate||, CODE, READONLY, ALIGN=2

                  FMC_DisableConfigUpdate PROC
;;;71       */
;;;72     void FMC_DisableConfigUpdate(void)
000000  4802              LDR      r0,|L3.12|
;;;73     {
;;;74         FMC->ISPCON &= ~FMC_ISPCON_CFGUEN_Msk;
000002  6801              LDR      r1,[r0,#0]
000004  2210              MOVS     r2,#0x10
000006  4391              BICS     r1,r1,r2
000008  6001              STR      r1,[r0,#0]
;;;75     }
00000a  4770              BX       lr
;;;76     
                          ENDP

                  |L3.12|
                          DCD      0x5000c000

                          AREA ||i.FMC_DisableLDUpdate||, CODE, READONLY, ALIGN=2

                  FMC_DisableLDUpdate PROC
;;;81       */
;;;82     void FMC_DisableLDUpdate(void)
000000  4802              LDR      r0,|L4.12|
;;;83     {
;;;84         FMC->ISPCON &= ~FMC_ISPCON_LDUEN_Msk;
000002  6801              LDR      r1,[r0,#0]
000004  2220              MOVS     r2,#0x20
000006  4391              BICS     r1,r1,r2
000008  6001              STR      r1,[r0,#0]
;;;85     }
00000a  4770              BX       lr
;;;86     
                          ENDP

                  |L4.12|
                          DCD      0x5000c000

                          AREA ||i.FMC_EnableAPUpdate||, CODE, READONLY, ALIGN=2

                  FMC_EnableAPUpdate PROC
;;;91       */
;;;92     void FMC_EnableAPUpdate(void)
000000  4802              LDR      r0,|L5.12|
;;;93     {
;;;94         FMC->ISPCON |= FMC_ISPCON_APUEN_Msk;
000002  6801              LDR      r1,[r0,#0]
000004  2208              MOVS     r2,#8
000006  4311              ORRS     r1,r1,r2
000008  6001              STR      r1,[r0,#0]
;;;95     }
00000a  4770              BX       lr
;;;96     
                          ENDP

                  |L5.12|
                          DCD      0x5000c000

                          AREA ||i.FMC_EnableConfigUpdate||, CODE, READONLY, ALIGN=2

                  FMC_EnableConfigUpdate PROC
;;;101      */
;;;102    void FMC_EnableConfigUpdate(void)
000000  4802              LDR      r0,|L6.12|
;;;103    {
;;;104        FMC->ISPCON |= FMC_ISPCON_CFGUEN_Msk;
000002  6801              LDR      r1,[r0,#0]
000004  2210              MOVS     r2,#0x10
000006  4311              ORRS     r1,r1,r2
000008  6001              STR      r1,[r0,#0]
;;;105    }
00000a  4770              BX       lr
;;;106    
                          ENDP

                  |L6.12|
                          DCD      0x5000c000

                          AREA ||i.FMC_EnableLDUpdate||, CODE, READONLY, ALIGN=2

                  FMC_EnableLDUpdate PROC
;;;111      */
;;;112    void FMC_EnableLDUpdate(void)
000000  4802              LDR      r0,|L7.12|
;;;113    {
;;;114        FMC->ISPCON |= FMC_ISPCON_LDUEN_Msk;
000002  6801              LDR      r1,[r0,#0]
000004  2220              MOVS     r2,#0x20
000006  4311              ORRS     r1,r1,r2
000008  6001              STR      r1,[r0,#0]
;;;115    }
00000a  4770              BX       lr
;;;116    
                          ENDP

                  |L7.12|
                          DCD      0x5000c000

                          AREA ||i.FMC_Erase||, CODE, READONLY, ALIGN=2

                  FMC_Erase PROC
;;;125      */
;;;126    int32_t FMC_Erase(uint32_t u32PageAddr)
000000  490a              LDR      r1,|L8.44|
;;;127    {
;;;128        FMC->ISPCMD = FMC_ISPCMD_PAGE_ERASE;
000002  2222              MOVS     r2,#0x22
000004  60ca              STR      r2,[r1,#0xc]
;;;129        FMC->ISPADR = u32PageAddr;
000006  6048              STR      r0,[r1,#4]
;;;130        FMC->ISPTRG = FMC_ISPTRG_ISPGO_Msk;
000008  2001              MOVS     r0,#1
00000a  6108              STR      r0,[r1,#0x10]
                  |L8.12|
;;;131    
;;;132        while (FMC->ISPTRG & FMC_ISPTRG_ISPGO_Msk) ;
00000c  6908              LDR      r0,[r1,#0x10]
00000e  07c0              LSLS     r0,r0,#31
000010  d1fc              BNE      |L8.12|
;;;133    
;;;134        if (FMC->ISPCON & FMC_ISPCON_ISPFF_Msk) {
000012  6808              LDR      r0,[r1,#0]
000014  0640              LSLS     r0,r0,#25
000016  d506              BPL      |L8.38|
;;;135            FMC->ISPCON |= FMC_ISPCON_ISPFF_Msk;
000018  6808              LDR      r0,[r1,#0]
00001a  2240              MOVS     r2,#0x40
00001c  4310              ORRS     r0,r0,r2
00001e  6008              STR      r0,[r1,#0]
;;;136            return -1;
000020  2000              MOVS     r0,#0
000022  43c0              MVNS     r0,r0
;;;137        }
;;;138        return 0;
;;;139    }
000024  4770              BX       lr
                  |L8.38|
000026  2000              MOVS     r0,#0                 ;138
000028  4770              BX       lr
;;;140    
                          ENDP

00002a  0000              DCW      0x0000
                  |L8.44|
                          DCD      0x5000c000

                          AREA ||i.FMC_GetBootSource||, CODE, READONLY, ALIGN=2

                  FMC_GetBootSource PROC
;;;147      */
;;;148    int32_t FMC_GetBootSource (void)
000000  4803              LDR      r0,|L9.16|
;;;149    {
;;;150        if (FMC->ISPCON & FMC_ISPCON_BS_Msk)
000002  6800              LDR      r0,[r0,#0]
000004  0780              LSLS     r0,r0,#30
000006  d501              BPL      |L9.12|
;;;151            return 1;
000008  2001              MOVS     r0,#1
;;;152        else
;;;153            return 0;
;;;154    }
00000a  4770              BX       lr
                  |L9.12|
00000c  2000              MOVS     r0,#0                 ;153
00000e  4770              BX       lr
;;;155    
                          ENDP

                  |L9.16|
                          DCD      0x5000c000

                          AREA ||i.FMC_Open||, CODE, READONLY, ALIGN=2

                  FMC_Open PROC
;;;160      */
;;;161    void FMC_Open(void)
000000  4802              LDR      r0,|L10.12|
;;;162    {
;;;163        FMC->ISPCON |=  FMC_ISPCON_ISPEN_Msk;
000002  6801              LDR      r1,[r0,#0]
000004  2201              MOVS     r2,#1
000006  4311              ORRS     r1,r1,r2
000008  6001              STR      r1,[r0,#0]
;;;164    }
00000a  4770              BX       lr
;;;165    
                          ENDP

                  |L10.12|
                          DCD      0x5000c000

                          AREA ||i.FMC_Read||, CODE, READONLY, ALIGN=2

                  FMC_Read PROC
;;;172      */
;;;173    uint32_t FMC_Read(uint32_t u32Addr)
000000  4905              LDR      r1,|L11.24|
;;;174    {
;;;175        FMC->ISPCMD = FMC_ISPCMD_READ;
000002  2200              MOVS     r2,#0
000004  60ca              STR      r2,[r1,#0xc]
;;;176        FMC->ISPADR = u32Addr;
000006  6048              STR      r0,[r1,#4]
;;;177        FMC->ISPTRG = FMC_ISPTRG_ISPGO_Msk;
000008  2001              MOVS     r0,#1
00000a  6108              STR      r0,[r1,#0x10]
                  |L11.12|
;;;178    
;;;179        while (FMC->ISPTRG & FMC_ISPTRG_ISPGO_Msk) ;
00000c  6908              LDR      r0,[r1,#0x10]
00000e  07c0              LSLS     r0,r0,#31
000010  d1fc              BNE      |L11.12|
;;;180    
;;;181        return FMC->ISPDAT;
000012  6888              LDR      r0,[r1,#8]
;;;182    }
000014  4770              BX       lr
;;;183    
                          ENDP

000016  0000              DCW      0x0000
                  |L11.24|
                          DCD      0x5000c000

                          AREA ||i.FMC_ReadCID||, CODE, READONLY, ALIGN=2

                  FMC_ReadCID PROC
;;;188      */
;;;189    uint32_t FMC_ReadCID(void)
000000  4805              LDR      r0,|L12.24|
;;;190    {
;;;191        FMC->ISPCMD = FMC_ISPCMD_READ_CID;
000002  210b              MOVS     r1,#0xb
000004  60c1              STR      r1,[r0,#0xc]
;;;192        FMC->ISPADR = 0x0;
000006  2100              MOVS     r1,#0
000008  6041              STR      r1,[r0,#4]
;;;193        FMC->ISPTRG = FMC_ISPTRG_ISPGO_Msk;
00000a  2101              MOVS     r1,#1
00000c  6101              STR      r1,[r0,#0x10]
                  |L12.14|
;;;194        while (FMC->ISPTRG & FMC_ISPTRG_ISPGO_Msk) ;
00000e  6901              LDR      r1,[r0,#0x10]
000010  07c9              LSLS     r1,r1,#31
000012  d1fc              BNE      |L12.14|
;;;195        return FMC->ISPDAT;
000014  6880              LDR      r0,[r0,#8]
;;;196    }
000016  4770              BX       lr
;;;197    
                          ENDP

                  |L12.24|
                          DCD      0x5000c000

                          AREA ||i.FMC_ReadConfig||, CODE, READONLY, ALIGN=2

                  FMC_ReadConfig PROC
;;;310      */
;;;311    int32_t FMC_ReadConfig(uint32_t *u32Config, uint32_t u32Count)
000000  b510              PUSH     {r4,lr}
;;;312    {
000002  4603              MOV      r3,r0
;;;313        u32Config[0] = FMC_Read(FMC_CONFIG_BASE);
000004  2003              MOVS     r0,#3
000006  460c              MOV      r4,r1                 ;312
000008  0500              LSLS     r0,r0,#20
00000a  f7fffffe          BL       FMC_Read
;;;314        if (u32Count < 2)
00000e  6018              STR      r0,[r3,#0]
000010  2c02              CMP      r4,#2
000012  d303              BCC      |L13.28|
;;;315            return 0;
;;;316        u32Config[1] = FMC_Read(FMC_CONFIG_BASE+4);
000014  4802              LDR      r0,|L13.32|
000016  f7fffffe          BL       FMC_Read
00001a  6058              STR      r0,[r3,#4]
                  |L13.28|
00001c  2000              MOVS     r0,#0                 ;315
;;;317        return 0;
;;;318    }
00001e  bd10              POP      {r4,pc}
;;;319    
                          ENDP

                  |L13.32|
                          DCD      0x00300004

                          AREA ||i.FMC_ReadDID||, CODE, READONLY, ALIGN=2

                  FMC_ReadDID PROC
;;;202      */
;;;203    uint32_t FMC_ReadDID(void)
000000  4805              LDR      r0,|L14.24|
;;;204    {
;;;205        FMC->ISPCMD = FMC_ISPCMD_READ_DID;
000002  210c              MOVS     r1,#0xc
000004  60c1              STR      r1,[r0,#0xc]
;;;206        FMC->ISPADR = 0;
000006  2100              MOVS     r1,#0
000008  6041              STR      r1,[r0,#4]
;;;207        FMC->ISPTRG = FMC_ISPTRG_ISPGO_Msk;
00000a  2101              MOVS     r1,#1
00000c  6101              STR      r1,[r0,#0x10]
                  |L14.14|
;;;208        while (FMC->ISPTRG & FMC_ISPTRG_ISPGO_Msk) ;
00000e  6901              LDR      r1,[r0,#0x10]
000010  07c9              LSLS     r1,r1,#31
000012  d1fc              BNE      |L14.14|
;;;209        return FMC->ISPDAT;
000014  6880              LDR      r0,[r0,#8]
;;;210    }
000016  4770              BX       lr
;;;211    
                          ENDP

                  |L14.24|
                          DCD      0x5000c000

                          AREA ||i.FMC_ReadDataFlashBaseAddr||, CODE, READONLY, ALIGN=2

                  FMC_ReadDataFlashBaseAddr PROC
;;;264      */
;;;265    uint32_t FMC_ReadDataFlashBaseAddr(void)
000000  4801              LDR      r0,|L15.8|
;;;266    {
;;;267        return FMC->DFBADR;
000002  6940              LDR      r0,[r0,#0x14]
;;;268    }
000004  4770              BX       lr
;;;269    
                          ENDP

000006  0000              DCW      0x0000
                  |L15.8|
                          DCD      0x5000c000

                          AREA ||i.FMC_ReadPID||, CODE, READONLY, ALIGN=2

                  FMC_ReadPID PROC
;;;216      */
;;;217    uint32_t FMC_ReadPID(void)
000000  4805              LDR      r0,|L16.24|
;;;218    {
;;;219        FMC->ISPCMD = FMC_ISPCMD_READ_DID;
000002  210c              MOVS     r1,#0xc
000004  60c1              STR      r1,[r0,#0xc]
;;;220        FMC->ISPADR = 0x04;
000006  2104              MOVS     r1,#4
000008  6041              STR      r1,[r0,#4]
;;;221        FMC->ISPTRG = FMC_ISPTRG_ISPGO_Msk;
00000a  2101              MOVS     r1,#1
00000c  6101              STR      r1,[r0,#0x10]
                  |L16.14|
;;;222        while (FMC->ISPTRG & FMC_ISPTRG_ISPGO_Msk) ;
00000e  6901              LDR      r1,[r0,#0x10]
000010  07c9              LSLS     r1,r1,#31
000012  d1fc              BNE      |L16.14|
;;;223        return FMC->ISPDAT;
000014  6880              LDR      r0,[r0,#8]
;;;224    }
000016  4770              BX       lr
;;;225    
                          ENDP

                  |L16.24|
                          DCD      0x5000c000

                          AREA ||i.FMC_ReadUCID||, CODE, READONLY, ALIGN=2

                  FMC_ReadUCID PROC
;;;231      */
;;;232    uint32_t FMC_ReadUCID(uint32_t u32Index)
000000  4906              LDR      r1,|L17.28|
;;;233    {
;;;234        FMC->ISPCMD = FMC_ISPCMD_READ_UID;
000002  2204              MOVS     r2,#4
000004  60ca              STR      r2,[r1,#0xc]
;;;235        FMC->ISPADR = (0x04 * u32Index) + 0x10;
000006  0080              LSLS     r0,r0,#2
000008  3010              ADDS     r0,r0,#0x10
00000a  6048              STR      r0,[r1,#4]
;;;236        FMC->ISPTRG = FMC_ISPTRG_ISPGO_Msk;
00000c  2001              MOVS     r0,#1
00000e  6108              STR      r0,[r1,#0x10]
                  |L17.16|
;;;237    
;;;238        while (FMC->ISPTRG & FMC_ISPTRG_ISPGO_Msk) ;
000010  6908              LDR      r0,[r1,#0x10]
000012  07c0              LSLS     r0,r0,#31
000014  d1fc              BNE      |L17.16|
;;;239    
;;;240        return FMC->ISPDAT;
000016  6888              LDR      r0,[r1,#8]
;;;241    }
000018  4770              BX       lr
;;;242    
                          ENDP

00001a  0000              DCW      0x0000
                  |L17.28|
                          DCD      0x5000c000

                          AREA ||i.FMC_ReadUID||, CODE, READONLY, ALIGN=2

                  FMC_ReadUID PROC
;;;248      */
;;;249    uint32_t FMC_ReadUID(uint32_t u32Index)
000000  4905              LDR      r1,|L18.24|
;;;250    {
;;;251        FMC->ISPCMD = FMC_ISPCMD_READ_UID;
000002  2204              MOVS     r2,#4
000004  60ca              STR      r2,[r1,#0xc]
;;;252        FMC->ISPADR = 0x04 * u32Index;
000006  0080              LSLS     r0,r0,#2
000008  6048              STR      r0,[r1,#4]
;;;253        FMC->ISPTRG = FMC_ISPTRG_ISPGO_Msk;
00000a  2001              MOVS     r0,#1
00000c  6108              STR      r0,[r1,#0x10]
                  |L18.14|
;;;254    
;;;255        while (FMC->ISPTRG & FMC_ISPTRG_ISPGO_Msk) ;
00000e  6908              LDR      r0,[r1,#0x10]
000010  07c0              LSLS     r0,r0,#31
000012  d1fc              BNE      |L18.14|
;;;256    
;;;257        return FMC->ISPDAT;
000014  6888              LDR      r0,[r1,#8]
;;;258    }
000016  4770              BX       lr
;;;259    
                          ENDP

                  |L18.24|
                          DCD      0x5000c000

                          AREA ||i.FMC_SetBootSource||, CODE, READONLY, ALIGN=2

                  FMC_SetBootSource PROC
;;;38       */
;;;39     void FMC_SetBootSource (int32_t i32BootSrc)
000000  4904              LDR      r1,|L19.20|
;;;40     {
;;;41         if (i32BootSrc == 1)
;;;42             FMC->ISPCON |= FMC_ISPCON_BS_Msk;
000002  2202              MOVS     r2,#2
000004  2801              CMP      r0,#1                 ;41
;;;43         else
;;;44             FMC->ISPCON &= ~FMC_ISPCON_BS_Msk;
000006  6808              LDR      r0,[r1,#0]
000008  d002              BEQ      |L19.16|
00000a  4390              BICS     r0,r0,r2
                  |L19.12|
00000c  6008              STR      r0,[r1,#0]            ;42
;;;45     }
00000e  4770              BX       lr
                  |L19.16|
000010  4310              ORRS     r0,r0,r2              ;42
000012  e7fb              B        |L19.12|
;;;46     
                          ENDP

                  |L19.20|
                          DCD      0x5000c000

                          AREA ||i.FMC_SetVectorPageAddr||, CODE, READONLY, ALIGN=2

                  FMC_SetVectorPageAddr PROC
;;;275      */
;;;276    void FMC_SetVectorPageAddr(uint32_t u32PageAddr)
000000  4904              LDR      r1,|L20.20|
;;;277    {
;;;278        FMC->ISPCMD = FMC_ISPCMD_VECMAP;
000002  222e              MOVS     r2,#0x2e
000004  60ca              STR      r2,[r1,#0xc]
;;;279        FMC->ISPADR = u32PageAddr;
000006  6048              STR      r0,[r1,#4]
;;;280        FMC->ISPTRG = FMC_ISPTRG_ISPGO_Msk;
000008  2001              MOVS     r0,#1
00000a  6108              STR      r0,[r1,#0x10]
                  |L20.12|
;;;281        while (FMC->ISPTRG & FMC_ISPTRG_ISPGO_Msk) ;
00000c  6908              LDR      r0,[r1,#0x10]
00000e  07c0              LSLS     r0,r0,#31
000010  d1fc              BNE      |L20.12|
;;;282    }
000012  4770              BX       lr
;;;283    
                          ENDP

                  |L20.20|
                          DCD      0x5000c000

                          AREA ||i.FMC_Write||, CODE, READONLY, ALIGN=2

                  FMC_Write PROC
;;;291      */
;;;292    void FMC_Write(uint32_t u32Addr, uint32_t u32Data)
000000  4a05              LDR      r2,|L21.24|
;;;293    {
;;;294        FMC->ISPCMD = FMC_ISPCMD_WRITE;
000002  2321              MOVS     r3,#0x21
000004  60d3              STR      r3,[r2,#0xc]
;;;295        FMC->ISPADR = u32Addr;
000006  6050              STR      r0,[r2,#4]
;;;296        FMC->ISPDAT = u32Data;
000008  6091              STR      r1,[r2,#8]
;;;297        FMC->ISPTRG = FMC_ISPTRG_ISPGO_Msk;
00000a  2001              MOVS     r0,#1
00000c  6110              STR      r0,[r2,#0x10]
                  |L21.14|
;;;298        while (FMC->ISPTRG & FMC_ISPTRG_ISPGO_Msk) ;
00000e  6910              LDR      r0,[r2,#0x10]
000010  07c0              LSLS     r0,r0,#31
000012  d1fc              BNE      |L21.14|
;;;299    }
000014  4770              BX       lr
;;;300    
                          ENDP

000016  0000              DCW      0x0000
                  |L21.24|
                          DCD      0x5000c000

                          AREA ||i.FMC_WriteConfig||, CODE, READONLY, ALIGN=2

                  FMC_WriteConfig PROC
;;;329      */
;;;330    int32_t FMC_WriteConfig(uint32_t *u32Config, uint32_t u32Count)
000000  b510              PUSH     {r4,lr}
;;;331    {
000002  4604              MOV      r4,r0
;;;332        FMC_EnableConfigUpdate();
000004  f7fffffe          BL       FMC_EnableConfigUpdate
;;;333        FMC_Erase(FMC_CONFIG_BASE);
000008  2303              MOVS     r3,#3
00000a  051b              LSLS     r3,r3,#20
00000c  4618              MOV      r0,r3
00000e  f7fffffe          BL       FMC_Erase
;;;334        FMC_Write(FMC_CONFIG_BASE, u32Config[0]);
000012  4618              MOV      r0,r3
000014  6821              LDR      r1,[r4,#0]
000016  f7fffffe          BL       FMC_Write
;;;335        FMC_Write(FMC_CONFIG_BASE+4, u32Config[1]);
00001a  4804              LDR      r0,|L22.44|
00001c  6861              LDR      r1,[r4,#4]
00001e  f7fffffe          BL       FMC_Write
;;;336        FMC_DisableConfigUpdate();
000022  f7fffffe          BL       FMC_DisableConfigUpdate
;;;337        return 0;
000026  2000              MOVS     r0,#0
;;;338    }
000028  bd10              POP      {r4,pc}
;;;339    
                          ENDP

00002a  0000              DCW      0x0000
                  |L22.44|
                          DCD      0x00300004

;*** Start embedded assembler ***

#line 1 "..\\..\\..\\..\\Library\\StdDriver\\src\\fmc.c"
	AREA ||.rev16_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___5_fmc_c_15679c7a____REV16|
#line 118 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cmInstr.h"
|__asm___5_fmc_c_15679c7a____REV16| PROC
#line 119

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___5_fmc_c_15679c7a____REVSH|
#line 132
|__asm___5_fmc_c_15679c7a____REVSH| PROC
#line 133

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
