; generated by ARM C/C++ Compiler, 4.1 [Build 894]
; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave -o.\obj\smpl_main.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\smpl_main.d --feedback=.\obj\UART_WAKE_UP__DEMO.fed --cpu=Cortex-M0 --apcs=interwork -O0 -I.\Lib_Inc -I.\App_Inc -IC:\Keil\ARM\RV31\Inc -IC:\Keil\ARM\CMSIS\Include -D__MICROLIB -D__LCDDISPLAY_BTL001_H --omf_browse=.\obj\smpl_main.crf App_Src\Smpl_Main.c]
                          THUMB

                          AREA ||i.main||, CODE, READONLY, ALIGN=2

                  main PROC
;;;42     /////////////////////////////////////////////////////////////////////////////////////////
;;;43     int32_t main(void)							   
000000  2059              MOVS     r0,#0x59
;;;44     {
;;;45     	UNLOCKREG();
000002  4917              LDR      r1,|L1.96|
000004  6008              STR      r0,[r1,#0]
000006  2016              MOVS     r0,#0x16
000008  6008              STR      r0,[r1,#0]
00000a  2088              MOVS     r0,#0x88
00000c  6008              STR      r0,[r1,#0]
;;;46     	CLK->CLKSEL0 =CLK->CLKSEL0&( ~CLK_CLKSEL0_HCLK_MASK)|CLK_CLKSEL0_HCLK_HIRC;	
00000e  4815              LDR      r0,|L1.100|
000010  6900              LDR      r0,[r0,#0x10]
000012  08c0              LSRS     r0,r0,#3
000014  00c0              LSLS     r0,r0,#3
000016  1dc0              ADDS     r0,r0,#7
000018  4912              LDR      r1,|L1.100|
00001a  6108              STR      r0,[r1,#0x10]
;;;47     	CLK->CLKSEL1 = CLK->CLKSEL1&(~CLK_CLKSEL1_UART_MASK)|CLK_CLKSEL1_UART_HIRC;
00001c  4608              MOV      r0,r1
00001e  6940              LDR      r0,[r0,#0x14]
000020  0880              LSRS     r0,r0,#2
000022  0080              LSLS     r0,r0,#2
000024  1cc0              ADDS     r0,r0,#3
000026  6148              STR      r0,[r1,#0x14]
;;;48      // CLK->PWRCTL |= CLK_PWRCTL_LXT_EN;	  //ڵģʽʹҪ1.5ma 
;;;49     	LOCKREG();
000028  2000              MOVS     r0,#0
00002a  490d              LDR      r1,|L1.96|
00002c  6008              STR      r0,[r1,#0]
;;;50     // 	
;;;51     // 	GPIOE->PMD    = GPIO_PMD_PMD6_OUTPUT ;
;;;52     // 	UART0_Init(115200) ;
;;;53     // 	UART0->THR=0x55;
;;;54     // 	delay(); 
;;;55     	
;;;56     	
;;;57         while(1)
00002e  e016              B        |L1.94|
                  |L1.48|
;;;58     	{	
;;;59     // 		GPIOE->DOUT |= 0x40 ;
;;;60     		UNLOCKREG();
000030  2059              MOVS     r0,#0x59
000032  490b              LDR      r1,|L1.96|
000034  6008              STR      r0,[r1,#0]
000036  2016              MOVS     r0,#0x16
000038  6008              STR      r0,[r1,#0]
00003a  2088              MOVS     r0,#0x88
00003c  6008              STR      r0,[r1,#0]
;;;61     		CLK->PWRCTL |= (CLK_PWRCTL_PWRDOWN_EN );	   /* Set power down bit */
00003e  4809              LDR      r0,|L1.100|
000040  6800              LDR      r0,[r0,#0]
000042  2140              MOVS     r1,#0x40
000044  4308              ORRS     r0,r0,r1
000046  4907              LDR      r1,|L1.100|
000048  6008              STR      r0,[r1,#0]
;;;62     		SCB->SCR |= 0x04;						   /* Sleep Deep */
00004a  4807              LDR      r0,|L1.104|
00004c  6900              LDR      r0,[r0,#0x10]
00004e  2104              MOVS     r1,#4
000050  4308              ORRS     r0,r0,r1
000052  4905              LDR      r1,|L1.104|
000054  6108              STR      r0,[r1,#0x10]
;;;63     		LOCKREG();                                       		
000056  2000              MOVS     r0,#0
000058  4901              LDR      r1,|L1.96|
00005a  6008              STR      r0,[r1,#0]
;;;64     		__wfi();
00005c  bf30              WFI      
                  |L1.94|
00005e  e7e7              B        |L1.48|
;;;65     						
;;;66     // 		UART0->CTL |= 0x00000200; 	   //enable Wake Up
;;;67     // 		delay();		
;;;68     	}
;;;69     }
                          ENDP

                  |L1.96|
                          DCD      0x50000100
                  |L1.100|
                          DCD      0x50000200
                  |L1.104|
                          DCD      0xe000ed00

;*** Start embedded assembler ***

#line 1 "App_Src\\Smpl_Main.c"
	AREA ||.rev16_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___11_Smpl_Main_c_main____REV16|
#line 114 "C:\\Keil\\ARM\\CMSIS\\Include\\core_cmInstr.h"
|__asm___11_Smpl_Main_c_main____REV16| PROC
#line 115

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___11_Smpl_Main_c_main____REVSH|
#line 128
|__asm___11_Smpl_Main_c_main____REVSH| PROC
#line 129

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***

                  __ARM_use_no_argv EQU 0
