; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\obj\main.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\main.d --cpu=Cortex-M0 --apcs=interwork --diag_suppress=9931 -I..\..\..\..\Library\CMSIS\Include -I..\..\..\..\Library\Device\Nuvoton\M031\Include -I..\..\..\..\Library\StdDriver\inc -IC:\Keil_v5\ARM\RV31\INC -IC:\Keil_v5\ARM\CMSIS\Include -D__MICROLIB -D__UVISION_VERSION=526 -DxxDEBUG_ENABLE_SEMIHOST --omf_browse=.\obj\main.crf ..\main.c]
                          THUMB

                          AREA ||i.SYS_Init||, CODE, READONLY, ALIGN=2

                  SYS_Init PROC
;;;309    }
;;;310    void SYS_Init(void)
000000  b570              PUSH     {r4-r6,lr}
;;;311    {
;;;312        /*---------------------------------------------------------------------------------------------------------*/
;;;313        /* Init System Clock                                                                                       */
;;;314        /*---------------------------------------------------------------------------------------------------------*/
;;;315        /* Enable HIRC clock */
;;;316        CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
000002  2004              MOVS     r0,#4
000004  f7fffffe          BL       CLK_EnableXtalRC
;;;317    
;;;318        /* Waiting for HIRC clock ready */
;;;319        CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
000008  2010              MOVS     r0,#0x10
00000a  f7fffffe          BL       CLK_WaitClockReady
;;;320    
;;;321        /* Switch HCLK clock source to HIRC and HCLK source divide 1 */
;;;322        CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
00000e  2100              MOVS     r1,#0
000010  2007              MOVS     r0,#7
000012  f7fffffe          BL       CLK_SetHCLK
;;;323    
;;;324        /* Select HIRC as the clock source of UART0 */
;;;325        CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART0SEL_HIRC, CLK_CLKDIV0_UART0(1));
000016  4c12              LDR      r4,|L1.96|
000018  2103              MOVS     r1,#3
00001a  2200              MOVS     r2,#0
00001c  0609              LSLS     r1,r1,#24
00001e  4620              MOV      r0,r4
000020  f7fffffe          BL       CLK_SetModuleClock
;;;326    
;;;327        /* Select PCLK1 as the clock source of SPI0 */
;;;328        CLK_SetModuleClock(SPI0_MODULE, CLK_CLKSEL2_SPI0SEL_PCLK1, MODULE_NoMsk);
000024  4d0f              LDR      r5,|L1.100|
000026  2200              MOVS     r2,#0
000028  2120              MOVS     r1,#0x20
00002a  4628              MOV      r0,r5
00002c  f7fffffe          BL       CLK_SetModuleClock
;;;329    
;;;330        /* Enable UART peripheral clock */
;;;331        CLK_EnableModuleClock(UART0_MODULE);
000030  4620              MOV      r0,r4
000032  f7fffffe          BL       CLK_EnableModuleClock
;;;332    
;;;333        /* Enable SPI0 peripheral clock */
;;;334        CLK_EnableModuleClock(SPI0_MODULE);
000036  4628              MOV      r0,r5
000038  f7fffffe          BL       CLK_EnableModuleClock
;;;335    
;;;336        /*---------------------------------------------------------------------------------------------------------*/
;;;337        /* Init I/O Multi-function                                                                                 */
;;;338        /*---------------------------------------------------------------------------------------------------------*/
;;;339        /* Set PB multi-function pins for UART0 RXD=PB.12 and TXD=PB.13 */
;;;340        SYS->GPB_MFPH = (SYS->GPB_MFPH & ~(SYS_GPB_MFPH_PB12MFP_Msk | SYS_GPB_MFPH_PB13MFP_Msk)) |
00003c  06a0              LSLS     r0,r4,#26
00003e  6bc1              LDR      r1,[r0,#0x3c]
000040  22ff              MOVS     r2,#0xff
000042  0412              LSLS     r2,r2,#16
000044  4391              BICS     r1,r1,r2
000046  2233              MOVS     r2,#0x33
000048  0452              LSLS     r2,r2,#17
00004a  1889              ADDS     r1,r1,r2
00004c  63c1              STR      r1,[r0,#0x3c]
;;;341                        (SYS_GPB_MFPH_PB12MFP_UART0_RXD | SYS_GPB_MFPH_PB13MFP_UART0_TXD);
;;;342    
;;;343        /* Setup SPI0 multi-function pins */
;;;344        /* PA.3 is SPI0_SS,   PA.2 is SPI0_CLK,
;;;345           PA.1 is SPI0_MISO, PA.0 is SPI0_MOSI*/
;;;346        SYS->GPA_MFPL = (SYS->GPA_MFPL & ~(SYS_GPA_MFPL_PA3MFP_Msk |
00004e  6b01              LDR      r1,[r0,#0x30]
000050  4a05              LDR      r2,|L1.104|
000052  0c09              LSRS     r1,r1,#16
000054  0409              LSLS     r1,r1,#16
000056  1889              ADDS     r1,r1,r2
000058  6301              STR      r1,[r0,#0x30]
;;;347                                           SYS_GPA_MFPL_PA2MFP_Msk |
;;;348                                           SYS_GPA_MFPL_PA1MFP_Msk |
;;;349                                           SYS_GPA_MFPL_PA0MFP_Msk)) |
;;;350                        (SYS_GPA_MFPL_PA3MFP_SPI0_SS |
;;;351                         SYS_GPA_MFPL_PA2MFP_SPI0_CLK |
;;;352                         SYS_GPA_MFPL_PA1MFP_SPI0_MISO |
;;;353                         SYS_GPA_MFPL_PA0MFP_SPI0_MOSI);
;;;354    
;;;355        /* Update System Core Clock */
;;;356        /* User can use SystemCoreClockUpdate() to calculate SystemCoreClock and CyclesPerUs automatically. */
;;;357        SystemCoreClockUpdate();
00005a  f7fffffe          BL       SystemCoreClockUpdate
;;;358    }
00005e  bd70              POP      {r4-r6,pc}
;;;359    
                          ENDP

                  |L1.96|
                          DCD      0x5f803d10
                  |L1.100|
                          DCD      0x6640000d
                  |L1.104|
                          DCD      0x00004444

                          AREA ||i.SpiFlash_ChipErase||, CODE, READONLY, ALIGN=2

                  SpiFlash_ChipErase PROC
;;;51     
;;;52     void SpiFlash_ChipErase(void)
000000  b570              PUSH     {r4-r6,lr}
;;;53     {
;;;54         // /CS: active
;;;55         SPI_SET_SS_LOW(SPI_FLASH_PORT);
000002  4811              LDR      r0,|L2.72|
000004  6881              LDR      r1,[r0,#8]
000006  240c              MOVS     r4,#0xc
000008  43a1              BICS     r1,r1,r4
00000a  2501              MOVS     r5,#1
00000c  4329              ORRS     r1,r1,r5
00000e  6081              STR      r1,[r0,#8]
;;;56     
;;;57         // send Command: 0x06, Write enable
;;;58         SPI_WRITE_TX(SPI_FLASH_PORT, 0x06);
000010  2106              MOVS     r1,#6
000012  6201              STR      r1,[r0,#0x20]
                  |L2.20|
;;;59     
;;;60         // wait tx finish
;;;61         while(SPI_IS_BUSY(SPI_FLASH_PORT));
000014  6941              LDR      r1,[r0,#0x14]
000016  07c9              LSLS     r1,r1,#31
000018  d1fc              BNE      |L2.20|
;;;62     
;;;63         // /CS: de-active
;;;64         SPI_SET_SS_HIGH(SPI_FLASH_PORT);
00001a  6881              LDR      r1,[r0,#8]
00001c  2208              MOVS     r2,#8
00001e  4391              BICS     r1,r1,r2
000020  2305              MOVS     r3,#5
000022  4319              ORRS     r1,r1,r3
000024  6081              STR      r1,[r0,#8]
;;;65     
;;;66         //////////////////////////////////////////
;;;67     
;;;68         // /CS: active
;;;69         SPI_SET_SS_LOW(SPI_FLASH_PORT);
000026  6881              LDR      r1,[r0,#8]
000028  43a1              BICS     r1,r1,r4
00002a  4329              ORRS     r1,r1,r5
00002c  6081              STR      r1,[r0,#8]
;;;70     
;;;71         // send Command: 0xC7, Chip Erase
;;;72         SPI_WRITE_TX(SPI_FLASH_PORT, 0xC7);
00002e  21c7              MOVS     r1,#0xc7
000030  6201              STR      r1,[r0,#0x20]
                  |L2.50|
;;;73     
;;;74         // wait tx finish
;;;75         while(SPI_IS_BUSY(SPI_FLASH_PORT));
000032  6941              LDR      r1,[r0,#0x14]
000034  07c9              LSLS     r1,r1,#31
000036  d1fc              BNE      |L2.50|
;;;76     
;;;77         // /CS: de-active
;;;78         SPI_SET_SS_HIGH(SPI_FLASH_PORT);
000038  6881              LDR      r1,[r0,#8]
00003a  4391              BICS     r1,r1,r2
00003c  4319              ORRS     r1,r1,r3
00003e  6081              STR      r1,[r0,#8]
;;;79     
;;;80         SPI_ClearRxFIFO(SPI_FLASH_PORT);
000040  f7fffffe          BL       SPI_ClearRxFIFO
;;;81     }
000044  bd70              POP      {r4-r6,pc}
;;;82     
                          ENDP

000046  0000              DCW      0x0000
                  |L2.72|
                          DCD      0x40061000

                          AREA ||i.SpiFlash_NormalPageProgram||, CODE, READONLY, ALIGN=2

                  SpiFlash_NormalPageProgram PROC
;;;149    
;;;150    void SpiFlash_NormalPageProgram(uint32_t StartAddress, uint8_t *u8DataBuffer)
000000  b5f8              PUSH     {r3-r7,lr}
;;;151    {
000002  4603              MOV      r3,r0
;;;152        uint32_t i = 0;
;;;153    
;;;154        // /CS: active
;;;155        SPI_SET_SS_LOW(SPI_FLASH_PORT);
000004  4819              LDR      r0,|L3.108|
000006  2200              MOVS     r2,#0                 ;152
000008  6884              LDR      r4,[r0,#8]
00000a  270c              MOVS     r7,#0xc
00000c  43bc              BICS     r4,r4,r7
00000e  2501              MOVS     r5,#1
000010  432c              ORRS     r4,r4,r5
000012  6084              STR      r4,[r0,#8]
;;;156    
;;;157        // send Command: 0x06, Write enable
;;;158        SPI_WRITE_TX(SPI_FLASH_PORT, 0x06);
000014  2406              MOVS     r4,#6
000016  6204              STR      r4,[r0,#0x20]
                  |L3.24|
;;;159    
;;;160        // wait tx finish
;;;161        while(SPI_IS_BUSY(SPI_FLASH_PORT));
000018  6944              LDR      r4,[r0,#0x14]
00001a  07e4              LSLS     r4,r4,#31
00001c  d1fc              BNE      |L3.24|
;;;162    
;;;163        // /CS: de-active
;;;164        SPI_SET_SS_HIGH(SPI_FLASH_PORT);
00001e  6886              LDR      r6,[r0,#8]
000020  2408              MOVS     r4,#8
000022  43a6              BICS     r6,r6,r4
000024  2505              MOVS     r5,#5
000026  432e              ORRS     r6,r6,r5
000028  6086              STR      r6,[r0,#8]
;;;165    
;;;166    
;;;167        // /CS: active
;;;168        SPI_SET_SS_LOW(SPI_FLASH_PORT);
00002a  6886              LDR      r6,[r0,#8]
00002c  43be              BICS     r6,r6,r7
00002e  2701              MOVS     r7,#1
000030  433e              ORRS     r6,r6,r7
000032  6086              STR      r6,[r0,#8]
;;;169    
;;;170        // send Command: 0x02, Page program
;;;171        SPI_WRITE_TX(SPI_FLASH_PORT, 0x02);
000034  2602              MOVS     r6,#2
000036  6206              STR      r6,[r0,#0x20]
;;;172    
;;;173        // send 24-bit start address
;;;174        SPI_WRITE_TX(SPI_FLASH_PORT, (StartAddress>>16) & 0xFF);
000038  021e              LSLS     r6,r3,#8
00003a  0e36              LSRS     r6,r6,#24
00003c  6206              STR      r6,[r0,#0x20]
;;;175        SPI_WRITE_TX(SPI_FLASH_PORT, (StartAddress>>8)  & 0xFF);
00003e  041e              LSLS     r6,r3,#16
000040  0e36              LSRS     r6,r6,#24
000042  6206              STR      r6,[r0,#0x20]
;;;176        SPI_WRITE_TX(SPI_FLASH_PORT, StartAddress       & 0xFF);
000044  b2db              UXTB     r3,r3
000046  6203              STR      r3,[r0,#0x20]
                  |L3.72|
;;;177    
;;;178        // write data
;;;179        while(1)
;;;180        {
;;;181            if(!SPI_GET_TX_FIFO_FULL_FLAG(SPI_FLASH_PORT))
000048  6943              LDR      r3,[r0,#0x14]
00004a  039b              LSLS     r3,r3,#14
00004c  d4fc              BMI      |L3.72|
;;;182            {
;;;183                SPI_WRITE_TX(SPI_FLASH_PORT, u8DataBuffer[i++]);
00004e  5c8b              LDRB     r3,[r1,r2]
000050  6203              STR      r3,[r0,#0x20]
000052  1c52              ADDS     r2,r2,#1
;;;184                if(i >= 255) break;
000054  2aff              CMP      r2,#0xff
000056  d3f7              BCC      |L3.72|
                  |L3.88|
;;;185            }
;;;186        }
;;;187    
;;;188        // wait tx finish
;;;189        while(SPI_IS_BUSY(SPI_FLASH_PORT));
000058  6941              LDR      r1,[r0,#0x14]
00005a  07c9              LSLS     r1,r1,#31
00005c  d1fc              BNE      |L3.88|
;;;190    
;;;191        // /CS: de-active
;;;192        SPI_SET_SS_HIGH(SPI_FLASH_PORT);
00005e  6881              LDR      r1,[r0,#8]
000060  43a1              BICS     r1,r1,r4
000062  4329              ORRS     r1,r1,r5
000064  6081              STR      r1,[r0,#8]
;;;193    
;;;194        SPI_ClearRxFIFO(SPI_FLASH_PORT);
000066  f7fffffe          BL       SPI_ClearRxFIFO
;;;195    }
00006a  bdf8              POP      {r3-r7,pc}
;;;196    
                          ENDP

                  |L3.108|
                          DCD      0x40061000

                          AREA ||i.SpiFlash_NormalRead||, CODE, READONLY, ALIGN=2

                  SpiFlash_NormalRead PROC
;;;196    
;;;197    void SpiFlash_NormalRead(uint32_t StartAddress, uint8_t *u8DataBuffer)
000000  b570              PUSH     {r4-r6,lr}
;;;198    {
;;;199        uint32_t i;
;;;200    
;;;201        // /CS: active
;;;202        SPI_SET_SS_LOW(SPI_FLASH_PORT);
000002  4c16              LDR      r4,|L4.92|
000004  460d              MOV      r5,r1                 ;198
000006  68a1              LDR      r1,[r4,#8]
000008  220c              MOVS     r2,#0xc
00000a  4391              BICS     r1,r1,r2
00000c  2201              MOVS     r2,#1
00000e  4311              ORRS     r1,r1,r2
000010  60a1              STR      r1,[r4,#8]
;;;203    
;;;204        // send Command: 0x03, Read data
;;;205        SPI_WRITE_TX(SPI_FLASH_PORT, 0x03);
000012  2103              MOVS     r1,#3
000014  6221              STR      r1,[r4,#0x20]
;;;206    
;;;207        // send 24-bit start address
;;;208        SPI_WRITE_TX(SPI_FLASH_PORT, (StartAddress>>16) & 0xFF);
000016  0201              LSLS     r1,r0,#8
000018  0e09              LSRS     r1,r1,#24
00001a  6221              STR      r1,[r4,#0x20]
;;;209        SPI_WRITE_TX(SPI_FLASH_PORT, (StartAddress>>8)  & 0xFF);
00001c  0401              LSLS     r1,r0,#16
00001e  0e09              LSRS     r1,r1,#24
000020  6221              STR      r1,[r4,#0x20]
;;;210        SPI_WRITE_TX(SPI_FLASH_PORT, StartAddress       & 0xFF);
000022  b2c0              UXTB     r0,r0
000024  6220              STR      r0,[r4,#0x20]
                  |L4.38|
;;;211    
;;;212        while(SPI_IS_BUSY(SPI_FLASH_PORT));
000026  6960              LDR      r0,[r4,#0x14]
000028  07c0              LSLS     r0,r0,#31
00002a  d1fc              BNE      |L4.38|
;;;213        // clear RX buffer
;;;214        SPI_ClearRxFIFO(SPI_FLASH_PORT);
00002c  4620              MOV      r0,r4
00002e  f7fffffe          BL       SPI_ClearRxFIFO
;;;215    
;;;216        // read data
;;;217        for(i=0; i<256; i++)
000032  2200              MOVS     r2,#0
000034  4611              MOV      r1,r2
                  |L4.54|
;;;218        {
;;;219            SPI_WRITE_TX(SPI_FLASH_PORT, 0x00);
000036  6221              STR      r1,[r4,#0x20]
                  |L4.56|
;;;220            while(SPI_IS_BUSY(SPI_FLASH_PORT));
000038  6963              LDR      r3,[r4,#0x14]
00003a  07d8              LSLS     r0,r3,#31
00003c  d1fc              BNE      |L4.56|
;;;221            u8DataBuffer[i] = SPI_READ_RX(SPI_FLASH_PORT);
00003e  6b20              LDR      r0,[r4,#0x30]
000040  54a8              STRB     r0,[r5,r2]
000042  1c52              ADDS     r2,r2,#1
000044  2aff              CMP      r2,#0xff              ;217
000046  d9f6              BLS      |L4.54|
                  |L4.72|
;;;222        }
;;;223    
;;;224        // wait tx finish
;;;225        while(SPI_IS_BUSY(SPI_FLASH_PORT));
000048  6960              LDR      r0,[r4,#0x14]
00004a  07c0              LSLS     r0,r0,#31
00004c  d1fc              BNE      |L4.72|
;;;226    
;;;227        // /CS: de-active
;;;228        SPI_SET_SS_HIGH(SPI_FLASH_PORT);
00004e  68a0              LDR      r0,[r4,#8]
000050  2108              MOVS     r1,#8
000052  4388              BICS     r0,r0,r1
000054  2105              MOVS     r1,#5
000056  4308              ORRS     r0,r0,r1
000058  60a0              STR      r0,[r4,#8]
;;;229    }
00005a  bd70              POP      {r4-r6,pc}
;;;230    
                          ENDP

                  |L4.92|
                          DCD      0x40061000

                          AREA ||i.SpiFlash_Read||, CODE, READONLY, ALIGN=2

                  SpiFlash_Read PROC
;;;276    }
;;;277    void SpiFlash_Read(uint32_t StartAddress, uint8_t *u8DataBuffer, uint8_t len)
000000  b570              PUSH     {r4-r6,lr}
;;;278    {
;;;279        uint32_t i;
;;;280    
;;;281        // /CS: active
;;;282        SPI_SET_SS_LOW(SPI_FLASH_PORT);
000002  4c17              LDR      r4,|L5.96|
000004  460e              MOV      r6,r1                 ;278
000006  68a1              LDR      r1,[r4,#8]
000008  4615              MOV      r5,r2                 ;278
00000a  220c              MOVS     r2,#0xc
00000c  4391              BICS     r1,r1,r2
00000e  2201              MOVS     r2,#1
000010  4311              ORRS     r1,r1,r2
000012  60a1              STR      r1,[r4,#8]
;;;283    
;;;284        // send Command: 0x03, Read data
;;;285        SPI_WRITE_TX(SPI_FLASH_PORT, 0x03);
000014  2103              MOVS     r1,#3
000016  6221              STR      r1,[r4,#0x20]
;;;286    
;;;287        // send 24-bit start address
;;;288        SPI_WRITE_TX(SPI_FLASH_PORT, (StartAddress>>16) & 0xFF);
000018  0201              LSLS     r1,r0,#8
00001a  0e09              LSRS     r1,r1,#24
00001c  6221              STR      r1,[r4,#0x20]
;;;289        SPI_WRITE_TX(SPI_FLASH_PORT, (StartAddress>>8)  & 0xFF);
00001e  0401              LSLS     r1,r0,#16
000020  0e09              LSRS     r1,r1,#24
000022  6221              STR      r1,[r4,#0x20]
;;;290        SPI_WRITE_TX(SPI_FLASH_PORT, StartAddress       & 0xFF);
000024  b2c0              UXTB     r0,r0
000026  6220              STR      r0,[r4,#0x20]
                  |L5.40|
;;;291    
;;;292        while(SPI_IS_BUSY(SPI_FLASH_PORT));
000028  6960              LDR      r0,[r4,#0x14]
00002a  07c0              LSLS     r0,r0,#31
00002c  d1fc              BNE      |L5.40|
;;;293        // clear RX buffer
;;;294        SPI_ClearRxFIFO(SPI_FLASH_PORT);
00002e  4620              MOV      r0,r4
000030  f7fffffe          BL       SPI_ClearRxFIFO
;;;295    
;;;296        // read data
;;;297        for(i=0; i<len; i++)
000034  2300              MOVS     r3,#0
000036  4619              MOV      r1,r3
000038  e006              B        |L5.72|
                  |L5.58|
;;;298        {
;;;299            SPI_WRITE_TX(SPI_FLASH_PORT, 0x00);
00003a  6221              STR      r1,[r4,#0x20]
                  |L5.60|
;;;300            while(SPI_IS_BUSY(SPI_FLASH_PORT));
00003c  6960              LDR      r0,[r4,#0x14]
00003e  07c0              LSLS     r0,r0,#31
000040  d1fc              BNE      |L5.60|
;;;301            u8DataBuffer[i] = SPI_READ_RX(SPI_FLASH_PORT);
000042  6b20              LDR      r0,[r4,#0x30]
000044  54f0              STRB     r0,[r6,r3]
000046  1c5b              ADDS     r3,r3,#1
                  |L5.72|
000048  42ab              CMP      r3,r5                 ;297
00004a  d3f6              BCC      |L5.58|
                  |L5.76|
;;;302        }
;;;303    
;;;304        // wait tx finish
;;;305        while(SPI_IS_BUSY(SPI_FLASH_PORT));
00004c  6960              LDR      r0,[r4,#0x14]
00004e  07c0              LSLS     r0,r0,#31
000050  d1fc              BNE      |L5.76|
;;;306    
;;;307        // /CS: de-active
;;;308        SPI_SET_SS_HIGH(SPI_FLASH_PORT);
000052  68a0              LDR      r0,[r4,#8]
000054  2108              MOVS     r1,#8
000056  4388              BICS     r0,r0,r1
000058  2105              MOVS     r1,#5
00005a  4308              ORRS     r0,r0,r1
00005c  60a0              STR      r0,[r4,#8]
;;;309    }
00005e  bd70              POP      {r4-r6,pc}
;;;310    void SYS_Init(void)
                          ENDP

                  |L5.96|
                          DCD      0x40061000

                          AREA ||i.SpiFlash_ReadMidDid||, CODE, READONLY, ALIGN=2

                  SpiFlash_ReadMidDid PROC
;;;20     
;;;21     uint16_t SpiFlash_ReadMidDid(void)
000000  b50c              PUSH     {r2,r3,lr}
;;;22     {
;;;23         uint8_t u8RxData[6], u8IDCnt = 0;
;;;24     
;;;25         // /CS: active
;;;26         SPI_SET_SS_LOW(SPI_FLASH_PORT);
000002  4912              LDR      r1,|L6.76|
000004  2000              MOVS     r0,#0                 ;23
000006  688a              LDR      r2,[r1,#8]
000008  230c              MOVS     r3,#0xc
00000a  439a              BICS     r2,r2,r3
00000c  2301              MOVS     r3,#1
00000e  431a              ORRS     r2,r2,r3
000010  608a              STR      r2,[r1,#8]
;;;27     
;;;28         // send Command: 0x90, Read Manufacturer/Device ID
;;;29         SPI_WRITE_TX(SPI_FLASH_PORT, 0x90);
000012  2290              MOVS     r2,#0x90
000014  620a              STR      r2,[r1,#0x20]
;;;30     
;;;31         // send 24-bit '0', dummy
;;;32         SPI_WRITE_TX(SPI_FLASH_PORT, 0x00);
000016  6208              STR      r0,[r1,#0x20]
;;;33         SPI_WRITE_TX(SPI_FLASH_PORT, 0x00);
000018  6208              STR      r0,[r1,#0x20]
;;;34         SPI_WRITE_TX(SPI_FLASH_PORT, 0x00);
00001a  6208              STR      r0,[r1,#0x20]
;;;35     
;;;36         // receive 16-bit
;;;37         SPI_WRITE_TX(SPI_FLASH_PORT, 0x00);
00001c  6208              STR      r0,[r1,#0x20]
;;;38         SPI_WRITE_TX(SPI_FLASH_PORT, 0x00);
00001e  6208              STR      r0,[r1,#0x20]
                  |L6.32|
;;;39     
;;;40         // wait tx finish
;;;41         while(SPI_IS_BUSY(SPI_FLASH_PORT));
000020  694a              LDR      r2,[r1,#0x14]
000022  07d2              LSLS     r2,r2,#31
000024  d1fc              BNE      |L6.32|
;;;42     
;;;43         // /CS: de-active
;;;44         SPI_SET_SS_HIGH(SPI_FLASH_PORT);
000026  688a              LDR      r2,[r1,#8]
000028  2308              MOVS     r3,#8
00002a  439a              BICS     r2,r2,r3
00002c  2305              MOVS     r3,#5
00002e  431a              ORRS     r2,r2,r3
000030  608a              STR      r2,[r1,#8]
000032  466b              MOV      r3,sp                 ;23
;;;45     
;;;46         while(!SPI_GET_RX_FIFO_EMPTY_FLAG(SPI_FLASH_PORT))
000034  e003              B        |L6.62|
                  |L6.54|
;;;47             u8RxData[u8IDCnt ++] = SPI_READ_RX(SPI_FLASH_PORT);
000036  6b0a              LDR      r2,[r1,#0x30]
000038  541a              STRB     r2,[r3,r0]
00003a  1c40              ADDS     r0,r0,#1
00003c  b2c0              UXTB     r0,r0
                  |L6.62|
00003e  694a              LDR      r2,[r1,#0x14]         ;46
000040  05d2              LSLS     r2,r2,#23             ;46
000042  d5f8              BPL      |L6.54|
;;;48     
;;;49         return ( (u8RxData[4]<<8) | u8RxData[5] );
000044  8898              LDRH     r0,[r3,#4]
000046  ba40              REV16    r0,r0
;;;50     }
000048  bd0c              POP      {r2,r3,pc}
;;;51     
                          ENDP

00004a  0000              DCW      0x0000
                  |L6.76|
                          DCD      0x40061000

                          AREA ||i.SpiFlash_ReadStatusReg||, CODE, READONLY, ALIGN=2

                  SpiFlash_ReadStatusReg PROC
;;;82     
;;;83     uint8_t SpiFlash_ReadStatusReg(void)
000000  480b              LDR      r0,|L7.48|
;;;84     {
;;;85         // /CS: active
;;;86         SPI_SET_SS_LOW(SPI_FLASH_PORT);
000002  6881              LDR      r1,[r0,#8]
000004  220c              MOVS     r2,#0xc
000006  4391              BICS     r1,r1,r2
000008  2201              MOVS     r2,#1
00000a  4311              ORRS     r1,r1,r2
00000c  6081              STR      r1,[r0,#8]
;;;87     
;;;88         // send Command: 0x05, Read status register
;;;89         SPI_WRITE_TX(SPI_FLASH_PORT, 0x05);
00000e  2205              MOVS     r2,#5
000010  6202              STR      r2,[r0,#0x20]
;;;90     
;;;91         // read status
;;;92         SPI_WRITE_TX(SPI_FLASH_PORT, 0x00);
000012  2100              MOVS     r1,#0
000014  6201              STR      r1,[r0,#0x20]
                  |L7.22|
;;;93     
;;;94         // wait tx finish
;;;95         while(SPI_IS_BUSY(SPI_FLASH_PORT));
000016  6941              LDR      r1,[r0,#0x14]
000018  07c9              LSLS     r1,r1,#31
00001a  d1fc              BNE      |L7.22|
;;;96     
;;;97         // /CS: de-active
;;;98         SPI_SET_SS_HIGH(SPI_FLASH_PORT);
00001c  6881              LDR      r1,[r0,#8]
00001e  2308              MOVS     r3,#8
000020  4399              BICS     r1,r1,r3
000022  4311              ORRS     r1,r1,r2
000024  6081              STR      r1,[r0,#8]
;;;99     
;;;100        // skip first rx data
;;;101        SPI_READ_RX(SPI_FLASH_PORT);
000026  6b01              LDR      r1,[r0,#0x30]
;;;102    
;;;103        return (SPI_READ_RX(SPI_FLASH_PORT) & 0xff);
000028  6b00              LDR      r0,[r0,#0x30]
00002a  b2c0              UXTB     r0,r0
;;;104    }
00002c  4770              BX       lr
;;;105    
                          ENDP

00002e  0000              DCW      0x0000
                  |L7.48|
                          DCD      0x40061000

                          AREA ||i.SpiFlash_WaitReady||, CODE, READONLY, ALIGN=1

                  SpiFlash_WaitReady PROC
;;;137    
;;;138    void SpiFlash_WaitReady(void)
000000  b500              PUSH     {lr}
                  |L8.2|
;;;139    {
;;;140        uint8_t ReturnValue;
;;;141    
;;;142        do
;;;143        {
;;;144            ReturnValue = SpiFlash_ReadStatusReg();
000002  f7fffffe          BL       SpiFlash_ReadStatusReg
;;;145            ReturnValue = ReturnValue & 1;
000006  07c0              LSLS     r0,r0,#31
000008  0fc0              LSRS     r0,r0,#31
;;;146        }
;;;147        while(ReturnValue!=0);   // check the BUSY bit
00000a  d1fa              BNE      |L8.2|
;;;148    }
00000c  bd00              POP      {pc}
;;;149    
                          ENDP


                          AREA ||i.SpiFlash_Write||, CODE, READONLY, ALIGN=2

                  SpiFlash_Write PROC
;;;230    
;;;231    void SpiFlash_Write(uint32_t StartAddress, uint8_t *u8DataBuffer, uint8_t len)
000000  b5f8              PUSH     {r3-r7,lr}
;;;232    {
000002  4604              MOV      r4,r0
;;;233        uint32_t i = 0;
;;;234    
;;;235        // /CS: active
;;;236        SPI_SET_SS_LOW(SPI_FLASH_PORT);
000004  481a              LDR      r0,|L9.112|
000006  2300              MOVS     r3,#0                 ;233
000008  6885              LDR      r5,[r0,#8]
00000a  260c              MOVS     r6,#0xc
00000c  43b5              BICS     r5,r5,r6
00000e  2601              MOVS     r6,#1
000010  4335              ORRS     r5,r5,r6
000012  6085              STR      r5,[r0,#8]
;;;237    
;;;238        // send Command: 0x06, Write enable
;;;239        SPI_WRITE_TX(SPI_FLASH_PORT, 0x06);
000014  2506              MOVS     r5,#6
000016  6205              STR      r5,[r0,#0x20]
                  |L9.24|
;;;240    
;;;241        // wait tx finish
;;;242        while(SPI_IS_BUSY(SPI_FLASH_PORT));
000018  6945              LDR      r5,[r0,#0x14]
00001a  07ed              LSLS     r5,r5,#31
00001c  d1fc              BNE      |L9.24|
;;;243    
;;;244        // /CS: de-active
;;;245        SPI_SET_SS_HIGH(SPI_FLASH_PORT);
00001e  6885              LDR      r5,[r0,#8]
000020  2608              MOVS     r6,#8
000022  43b5              BICS     r5,r5,r6
000024  2705              MOVS     r7,#5
000026  433d              ORRS     r5,r5,r7
000028  6085              STR      r5,[r0,#8]
;;;246    
;;;247    
;;;248        // /CS: active
;;;249        SPI_SET_SS_LOW(SPI_FLASH_PORT);
00002a  6885              LDR      r5,[r0,#8]
00002c  260c              MOVS     r6,#0xc
00002e  43b5              BICS     r5,r5,r6
000030  2601              MOVS     r6,#1
000032  4335              ORRS     r5,r5,r6
000034  6085              STR      r5,[r0,#8]
;;;250    
;;;251        // send Command: 0x02, Page program
;;;252        SPI_WRITE_TX(SPI_FLASH_PORT, 0x02);
000036  2502              MOVS     r5,#2
000038  6205              STR      r5,[r0,#0x20]
;;;253    
;;;254        // send 24-bit start address
;;;255        SPI_WRITE_TX(SPI_FLASH_PORT, (StartAddress>>16) & 0xFF);
00003a  0225              LSLS     r5,r4,#8
00003c  0e2d              LSRS     r5,r5,#24
00003e  6205              STR      r5,[r0,#0x20]
;;;256        SPI_WRITE_TX(SPI_FLASH_PORT, (StartAddress>>8)  & 0xFF);
000040  0425              LSLS     r5,r4,#16
000042  0e2d              LSRS     r5,r5,#24
000044  6205              STR      r5,[r0,#0x20]
;;;257        SPI_WRITE_TX(SPI_FLASH_PORT, StartAddress       & 0xFF);
000046  b2e4              UXTB     r4,r4
000048  6204              STR      r4,[r0,#0x20]
                  |L9.74|
;;;258    
;;;259        // write data
;;;260        while(1)
;;;261        {
;;;262            if(!SPI_GET_TX_FIFO_FULL_FLAG(SPI_FLASH_PORT))
00004a  6944              LDR      r4,[r0,#0x14]
00004c  03a4              LSLS     r4,r4,#14
00004e  d4fc              BMI      |L9.74|
;;;263            {
;;;264                SPI_WRITE_TX(SPI_FLASH_PORT, u8DataBuffer[i++]);
000050  5ccc              LDRB     r4,[r1,r3]
000052  6204              STR      r4,[r0,#0x20]
000054  1c5b              ADDS     r3,r3,#1
;;;265                if(i >= len) break;
000056  4293              CMP      r3,r2
000058  d3f7              BCC      |L9.74|
                  |L9.90|
;;;266            }
;;;267        }
;;;268    
;;;269        // wait tx finish
;;;270        while(SPI_IS_BUSY(SPI_FLASH_PORT));
00005a  6941              LDR      r1,[r0,#0x14]
00005c  07c9              LSLS     r1,r1,#31
00005e  d1fc              BNE      |L9.90|
;;;271    
;;;272        // /CS: de-active
;;;273        SPI_SET_SS_HIGH(SPI_FLASH_PORT);
000060  6881              LDR      r1,[r0,#8]
000062  2208              MOVS     r2,#8
000064  4391              BICS     r1,r1,r2
000066  4339              ORRS     r1,r1,r7
000068  6081              STR      r1,[r0,#8]
;;;274    
;;;275        SPI_ClearRxFIFO(SPI_FLASH_PORT);
00006a  f7fffffe          BL       SPI_ClearRxFIFO
;;;276    }
00006e  bdf8              POP      {r3-r7,pc}
;;;277    void SpiFlash_Read(uint32_t StartAddress, uint8_t *u8DataBuffer, uint8_t len)
                          ENDP

                  |L9.112|
                          DCD      0x40061000

                          AREA ||i.SpiFlash_WriteStatusReg||, CODE, READONLY, ALIGN=2

                  SpiFlash_WriteStatusReg PROC
;;;105    
;;;106    void SpiFlash_WriteStatusReg(uint8_t u8Value)
000000  b570              PUSH     {r4-r6,lr}
;;;107    {
;;;108        // /CS: active
;;;109        SPI_SET_SS_LOW(SPI_FLASH_PORT);
000002  4910              LDR      r1,|L10.68|
000004  688a              LDR      r2,[r1,#8]
000006  240c              MOVS     r4,#0xc
000008  43a2              BICS     r2,r2,r4
00000a  2301              MOVS     r3,#1
00000c  431a              ORRS     r2,r2,r3
00000e  608a              STR      r2,[r1,#8]
;;;110    
;;;111        // send Command: 0x06, Write enable
;;;112        SPI_WRITE_TX(SPI_FLASH_PORT, 0x06);
000010  2206              MOVS     r2,#6
000012  620a              STR      r2,[r1,#0x20]
                  |L10.20|
;;;113    
;;;114        // wait tx finish
;;;115        while(SPI_IS_BUSY(SPI_FLASH_PORT));
000014  694a              LDR      r2,[r1,#0x14]
000016  07d2              LSLS     r2,r2,#31
000018  d1fc              BNE      |L10.20|
;;;116    
;;;117        // /CS: de-active
;;;118        SPI_SET_SS_HIGH(SPI_FLASH_PORT);
00001a  688e              LDR      r6,[r1,#8]
00001c  2208              MOVS     r2,#8
00001e  4396              BICS     r6,r6,r2
000020  2505              MOVS     r5,#5
000022  432e              ORRS     r6,r6,r5
000024  608e              STR      r6,[r1,#8]
;;;119    
;;;120        ///////////////////////////////////////
;;;121    
;;;122        // /CS: active
;;;123        SPI_SET_SS_LOW(SPI_FLASH_PORT);
000026  688e              LDR      r6,[r1,#8]
000028  43a6              BICS     r6,r6,r4
00002a  431e              ORRS     r6,r6,r3
00002c  608e              STR      r6,[r1,#8]
;;;124    
;;;125        // send Command: 0x01, Write status register
;;;126        SPI_WRITE_TX(SPI_FLASH_PORT, 0x01);
00002e  620b              STR      r3,[r1,#0x20]
;;;127    
;;;128        // write status
;;;129        SPI_WRITE_TX(SPI_FLASH_PORT, u8Value);
000030  6208              STR      r0,[r1,#0x20]
                  |L10.50|
;;;130    
;;;131        // wait tx finish
;;;132        while(SPI_IS_BUSY(SPI_FLASH_PORT));
000032  6948              LDR      r0,[r1,#0x14]
000034  07c0              LSLS     r0,r0,#31
000036  d1fc              BNE      |L10.50|
;;;133    
;;;134        // /CS: de-active
;;;135        SPI_SET_SS_HIGH(SPI_FLASH_PORT);
000038  6888              LDR      r0,[r1,#8]
00003a  4390              BICS     r0,r0,r2
00003c  4328              ORRS     r0,r0,r5
00003e  6088              STR      r0,[r1,#8]
;;;136    }
000040  bd70              POP      {r4-r6,pc}
;;;137    
                          ENDP

000042  0000              DCW      0x0000
                  |L10.68|
                          DCD      0x40061000

                          AREA ||i.main||, CODE, READONLY, ALIGN=2

                          REQUIRE _printf_percent
                          REQUIRE _printf_x
                          REQUIRE _printf_longlong_hex
                  main PROC
;;;360    /* Main */
;;;361    int main(void)
000000  b508              PUSH     {r3,lr}
;;;362    {
;;;363        uint32_t u32ByteCount, u32FlashAddress, u32PageNumber;
;;;364        uint32_t nError = 0;
000002  2500              MOVS     r5,#0
000004  2259              MOVS     r2,#0x59
000006  4843              LDR      r0,|L11.276|
000008  2116              MOVS     r1,#0x16
00000a  2388              MOVS     r3,#0x88
                  |L11.12|
00000c  6002              STR      r2,[r0,#0]
00000e  6001              STR      r1,[r0,#0]
000010  6003              STR      r3,[r0,#0]
000012  6804              LDR      r4,[r0,#0]
000014  2c00              CMP      r4,#0
000016  d0f9              BEQ      |L11.12|
;;;365        uint16_t u16ID;
;;;366    
;;;367        /* Unlock protected registers */
;;;368        SYS_UnlockReg();
;;;369    
;;;370        /* Init System, IP clock and multi-function I/O. */
;;;371        SYS_Init();
000018  f7fffffe          BL       SYS_Init
;;;372    
;;;373        /* Init UART to 115200-8n1 for print message */
;;;374        UART_Open(UART0, 115200);
00001c  21e1              MOVS     r1,#0xe1
00001e  0249              LSLS     r1,r1,#9
000020  483d              LDR      r0,|L11.280|
000022  f7fffffe          BL       UART_Open
;;;375    
;;;376        /* Configure SPI_FLASH_PORT as a master, MSB first, 8-bit transaction, SPI Mode-0 timing, clock is 20MHz */
;;;377        SPI_Open(SPI_FLASH_PORT, SPI_MASTER, SPI_MODE_0, 8, 20000000);
000026  483d              LDR      r0,|L11.284|
000028  4c3d              LDR      r4,|L11.288|
00002a  9000              STR      r0,[sp,#0]
00002c  2308              MOVS     r3,#8
00002e  2204              MOVS     r2,#4
000030  2100              MOVS     r1,#0
000032  4620              MOV      r0,r4
000034  f7fffffe          BL       SPI_Open
;;;378    
;;;379        /* Disable auto SS function, control SS signal manually. */
;;;380        SPI_DisableAutoSS(SPI_FLASH_PORT);
000038  4620              MOV      r0,r4
00003a  f7fffffe          BL       SPI_DisableAutoSS
;;;381    
;;;382        printf("\n+------------------------------------------------------------------------+\n");
00003e  4839              LDR      r0,|L11.292|
000040  f7fffffe          BL       __2printf
;;;383        printf("|                 M031 SPI Sample with SPI Flash                         |\n");
000044  4838              LDR      r0,|L11.296|
000046  f7fffffe          BL       __2printf
;;;384        printf("+------------------------------------------------------------------------+\n");
00004a  4838              LDR      r0,|L11.300|
00004c  f7fffffe          BL       __2printf
;;;385    #if 0
;;;386        if((u16ID = SpiFlash_ReadMidDid()) != 0xEF14)
;;;387        {
;;;388            printf("Wrong ID, 0x%x\n", u16ID);
;;;389            while(1);
;;;390        }
;;;391        else
;;;392            printf("Flash found: W25X16 ...\n");
;;;393    #else
;;;394    		u16ID = SpiFlash_ReadMidDid();
000050  f7fffffe          BL       SpiFlash_ReadMidDid
;;;395    		if(u16ID == 0xEF13)
000054  4a36              LDR      r2,|L11.304|
000056  4601              MOV      r1,r0                 ;394
000058  4290              CMP      r0,r2
00005a  d101              BNE      |L11.96|
;;;396            printf("Flash found: W25Q80 ...\n");
00005c  a035              ADR      r0,|L11.308|
00005e  e00a              B        |L11.118|
                  |L11.96|
;;;397        else if(u16ID == 0xEF14)
000060  4833              LDR      r0,|L11.304|
000062  1c40              ADDS     r0,r0,#1
000064  4281              CMP      r1,r0
000066  d101              BNE      |L11.108|
;;;398            printf("Flash found: W25Q16 ...\n");
000068  a039              ADR      r0,|L11.336|
00006a  e004              B        |L11.118|
                  |L11.108|
;;;399    		else if(u16ID == 0xEF15)
00006c  4830              LDR      r0,|L11.304|
00006e  1c80              ADDS     r0,r0,#2
000070  4281              CMP      r1,r0
000072  d148              BNE      |L11.262|
;;;400            printf("Flash found: W25Q32 ...\n");
000074  a03d              ADR      r0,|L11.364|
                  |L11.118|
000076  f7fffffe          BL       __2printf
;;;401    		else
;;;402        {
;;;403            printf("Wrong ID, 0x%x\n", u16ID);
;;;404            while(1);
;;;405        }
;;;406    #endif
;;;407        printf("Erase chip ...");
00007a  a043              ADR      r0,|L11.392|
00007c  f7fffffe          BL       __2printf
;;;408    
;;;409        /* Erase SPI flash */
;;;410        SpiFlash_ChipErase();
000080  f7fffffe          BL       SpiFlash_ChipErase
;;;411    
;;;412        /* Wait ready */
;;;413        SpiFlash_WaitReady();
000084  f7fffffe          BL       SpiFlash_WaitReady
;;;414    
;;;415        printf("[OK]\n");
000088  a043              ADR      r0,|L11.408|
00008a  f7fffffe          BL       __2printf
;;;416    #if 0    //write one page
;;;417        /* init source data buffer */
;;;418        for(u32ByteCount=0; u32ByteCount<TEST_LENGTH; u32ByteCount++)
;;;419        {
;;;420            SrcArray[u32ByteCount] = u32ByteCount;
;;;421        }
;;;422    
;;;423        printf("Start to normal write data to Flash ...");
;;;424        /* Program SPI flash */
;;;425        u32FlashAddress = 0;
;;;426        for(u32PageNumber=0; u32PageNumber<TEST_NUMBER; u32PageNumber++)
;;;427        {
;;;428            /* page program */
;;;429            SpiFlash_NormalPageProgram(u32FlashAddress, SrcArray);
;;;430            SpiFlash_WaitReady();
;;;431            u32FlashAddress += 0x100;
;;;432        }
;;;433    
;;;434        printf("[OK]\n");
;;;435    
;;;436        /* clear destination data buffer */
;;;437        for(u32ByteCount=0; u32ByteCount<TEST_LENGTH; u32ByteCount++)
;;;438        {
;;;439            DestArray[u32ByteCount] = 0;
;;;440        }
;;;441    
;;;442        printf("Normal Read & Compare ...");
;;;443    
;;;444        /* Read SPI flash */
;;;445        u32FlashAddress = 0;
;;;446        for(u32PageNumber=0; u32PageNumber<TEST_NUMBER; u32PageNumber++)
;;;447        {
;;;448            /* page read */
;;;449            SpiFlash_NormalRead(u32FlashAddress, DestArray);
;;;450            u32FlashAddress += 0x100;
;;;451    
;;;452            for(u32ByteCount=0; u32ByteCount<TEST_LENGTH; u32ByteCount++)
;;;453            {
;;;454                if(DestArray[u32ByteCount] != SrcArray[u32ByteCount])
;;;455                    nError ++;
;;;456            }
;;;457        }
;;;458    
;;;459        if(nError == 0)
;;;460            printf("[OK]\n");
;;;461        else
;;;462            printf("[FAIL]\n");
;;;463    #else //write 10 bytes
;;;464    		printf("Write 10 bytes to SPI Flash.\r\n");
00008e  a044              ADR      r0,|L11.416|
000090  f7fffffe          BL       __2printf
;;;465        printf("Start to write data to Flash ...\r\n");
000094  a04a              ADR      r0,|L11.448|
000096  f7fffffe          BL       __2printf
;;;466        /* init source data buffer */
;;;467        for(u32ByteCount=0; u32ByteCount<10; u32ByteCount++)
;;;468        {
;;;469            SrcArray[u32ByteCount] = u32ByteCount;
00009a  4e52              LDR      r6,|L11.484|
00009c  2400              MOVS     r4,#0                 ;467
                  |L11.158|
00009e  b2e1              UXTB     r1,r4
0000a0  5531              STRB     r1,[r6,r4]
;;;470    		    printf("0x%x ",SrcArray[u32ByteCount]);
0000a2  a051              ADR      r0,|L11.488|
0000a4  f7fffffe          BL       __2printf
0000a8  1c64              ADDS     r4,r4,#1
0000aa  2c0a              CMP      r4,#0xa               ;467
0000ac  d3f7              BCC      |L11.158|
;;;471        }
;;;472        /* Program SPI flash */
;;;473        u32FlashAddress = 0;
0000ae  2000              MOVS     r0,#0
;;;474    		SpiFlash_Write(u32FlashAddress,SrcArray,10);
0000b0  220a              MOVS     r2,#0xa
0000b2  494c              LDR      r1,|L11.484|
0000b4  f7fffffe          BL       SpiFlash_Write
;;;475        SpiFlash_WaitReady();
0000b8  f7fffffe          BL       SpiFlash_WaitReady
;;;476        printf("[OK]\n");
0000bc  a036              ADR      r0,|L11.408|
0000be  f7fffffe          BL       __2printf
;;;477    
;;;478        /* clear destination data buffer */
;;;479        for(u32ByteCount=0; u32ByteCount<TEST_LENGTH; u32ByteCount++)
0000c2  2000              MOVS     r0,#0
;;;480        {
;;;481            DestArray[u32ByteCount] = 0;
0000c4  4f4a              LDR      r7,|L11.496|
0000c6  4601              MOV      r1,r0                 ;479
                  |L11.200|
0000c8  5439              STRB     r1,[r7,r0]
0000ca  1c40              ADDS     r0,r0,#1
0000cc  28ff              CMP      r0,#0xff              ;479
0000ce  d9fb              BLS      |L11.200|
;;;482        }
;;;483    
;;;484        printf("Read data& Compare ...\r\n");
0000d0  a048              ADR      r0,|L11.500|
0000d2  f7fffffe          BL       __2printf
;;;485    
;;;486        /* Read SPI flash */
;;;487        u32FlashAddress = 0;
0000d6  2000              MOVS     r0,#0
;;;488        /* page read */
;;;489    		SpiFlash_Read(u32FlashAddress, DestArray,10);
0000d8  220a              MOVS     r2,#0xa
0000da  4945              LDR      r1,|L11.496|
0000dc  f7fffffe          BL       SpiFlash_Read
;;;490        for(u32ByteCount=0; u32ByteCount<10; u32ByteCount++)
0000e0  2400              MOVS     r4,#0
                  |L11.226|
;;;491        {
;;;492            printf("0x%x ",DestArray[u32ByteCount]);
0000e2  5d39              LDRB     r1,[r7,r4]
0000e4  a040              ADR      r0,|L11.488|
0000e6  f7fffffe          BL       __2printf
;;;493    			  if(DestArray[u32ByteCount] != SrcArray[u32ByteCount])
0000ea  5d38              LDRB     r0,[r7,r4]
0000ec  5d31              LDRB     r1,[r6,r4]
0000ee  4288              CMP      r0,r1
0000f0  d000              BEQ      |L11.244|
0000f2  1c6d              ADDS     r5,r5,#1
                  |L11.244|
0000f4  1c64              ADDS     r4,r4,#1
0000f6  2c0a              CMP      r4,#0xa               ;490
0000f8  d3f3              BCC      |L11.226|
;;;494    				    nError ++;
;;;495        }
;;;496    #endif		
;;;497        if(nError == 0)
0000fa  2d00              CMP      r5,#0
0000fc  d007              BEQ      |L11.270|
;;;498            printf("[OK]\n");
;;;499        else
;;;500            printf("[FAIL]\n");
0000fe  a044              ADR      r0,|L11.528|
                  |L11.256|
000100  f7fffffe          BL       __2printf
                  |L11.260|
;;;501        while(1);
000104  e7fe              B        |L11.260|
                  |L11.262|
000106  a044              ADR      r0,|L11.536|
000108  f7fffffe          BL       __2printf
                  |L11.268|
00010c  e7fe              B        |L11.268|
                  |L11.270|
00010e  a022              ADR      r0,|L11.408|
000110  e7f6              B        |L11.256|
;;;502    }
;;;503    
                          ENDP

000112  0000              DCW      0x0000
                  |L11.276|
                          DCD      0x40000100
                  |L11.280|
                          DCD      0x40070000
                  |L11.284|
                          DCD      0x01312d00
                  |L11.288|
                          DCD      0x40061000
                  |L11.292|
                          DCD      ||.conststring||
                  |L11.296|
                          DCD      ||.conststring||+0x50
                  |L11.300|
                          DCD      ||.conststring||+0x9c
                  |L11.304|
                          DCD      0x0000ef13
                  |L11.308|
000134  466c6173          DCB      "Flash found: W25Q80 ...\n",0
000138  6820666f
00013c  756e643a
000140  20573235
000144  51383020
000148  2e2e2e0a
00014c  00      
00014d  00                DCB      0
00014e  00                DCB      0
00014f  00                DCB      0
                  |L11.336|
000150  466c6173          DCB      "Flash found: W25Q16 ...\n",0
000154  6820666f
000158  756e643a
00015c  20573235
000160  51313620
000164  2e2e2e0a
000168  00      
000169  00                DCB      0
00016a  00                DCB      0
00016b  00                DCB      0
                  |L11.364|
00016c  466c6173          DCB      "Flash found: W25Q32 ...\n",0
000170  6820666f
000174  756e643a
000178  20573235
00017c  51333220
000180  2e2e2e0a
000184  00      
000185  00                DCB      0
000186  00                DCB      0
000187  00                DCB      0
                  |L11.392|
000188  45726173          DCB      "Erase chip ...",0
00018c  65206368
000190  6970202e
000194  2e2e00  
000197  00                DCB      0
                  |L11.408|
000198  5b4f4b5d          DCB      "[OK]\n",0
00019c  0a00    
00019e  00                DCB      0
00019f  00                DCB      0
                  |L11.416|
0001a0  57726974          DCB      "Write 10 bytes to SPI Flash.\r\n",0
0001a4  65203130
0001a8  20627974
0001ac  65732074
0001b0  6f205350
0001b4  4920466c
0001b8  6173682e
0001bc  0d0a00  
0001bf  00                DCB      0
                  |L11.448|
0001c0  53746172          DCB      "Start to write data to Flash ...\r\n",0
0001c4  7420746f
0001c8  20777269
0001cc  74652064
0001d0  61746120
0001d4  746f2046
0001d8  6c617368
0001dc  202e2e2e
0001e0  0d0a00  
0001e3  00                DCB      0
                  |L11.484|
                          DCD      ||.bss||
                  |L11.488|
0001e8  30782578          DCB      "0x%x ",0
0001ec  2000    
0001ee  00                DCB      0
0001ef  00                DCB      0
                  |L11.496|
                          DCD      ||.bss||+0x100
                  |L11.500|
0001f4  52656164          DCB      "Read data& Compare ...\r\n",0
0001f8  20646174
0001fc  61262043
000200  6f6d7061
000204  7265202e
000208  2e2e0d0a
00020c  00      
00020d  00                DCB      0
00020e  00                DCB      0
00020f  00                DCB      0
                  |L11.528|
000210  5b464149          DCB      "[FAIL]\n",0
000214  4c5d0a00
                  |L11.536|
000218  57726f6e          DCB      "Wrong ID, 0x%x\n",0
00021c  67204944
000220  2c203078
000224  25780a00

                          AREA ||.bss||, DATA, NOINIT, ALIGN=0

                  SrcArray
                          %        256
                  DestArray
                          %        256

                          AREA ||.conststring||, DATA, READONLY, MERGE=1, STRINGS, ALIGN=2

000000  0a2b2d2d          DCB      "\n+----------------------------------------------------"
000004  2d2d2d2d
000008  2d2d2d2d
00000c  2d2d2d2d
000010  2d2d2d2d
000014  2d2d2d2d
000018  2d2d2d2d
00001c  2d2d2d2d
000020  2d2d2d2d
000024  2d2d2d2d
000028  2d2d2d2d
00002c  2d2d2d2d
000030  2d2d2d2d
000034  2d2d    
000036  2d2d2d2d          DCB      "--------------------+\n",0
00003a  2d2d2d2d
00003e  2d2d2d2d
000042  2d2d2d2d
000046  2d2d2d2d
00004a  2b0a00  
00004d  00                DCB      0
00004e  00                DCB      0
00004f  00                DCB      0
000050  7c202020          DCB      "|                 M031 SPI Sample with SPI Flash       "
000054  20202020
000058  20202020
00005c  20202020
000060  20204d30
000064  33312053
000068  50492053
00006c  616d706c
000070  65207769
000074  74682053
000078  50492046
00007c  6c617368
000080  20202020
000084  202020  
000087  20202020          DCB      "                  |\n",0
00008b  20202020
00008f  20202020
000093  20202020
000097  20207c0a
00009b  00      
00009c  2b2d2d2d          DCB      "+------------------------------------------------------"
0000a0  2d2d2d2d
0000a4  2d2d2d2d
0000a8  2d2d2d2d
0000ac  2d2d2d2d
0000b0  2d2d2d2d
0000b4  2d2d2d2d
0000b8  2d2d2d2d
0000bc  2d2d2d2d
0000c0  2d2d2d2d
0000c4  2d2d2d2d
0000c8  2d2d2d2d
0000cc  2d2d2d2d
0000d0  2d2d2d  
0000d3  2d2d2d2d          DCB      "------------------+\n",0
0000d7  2d2d2d2d
0000db  2d2d2d2d
0000df  2d2d2d2d
0000e3  2d2d2b0a
0000e7  00      

;*** Start embedded assembler ***

#line 1 "..\\main.c"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___6_main_c_87818743____REV16|
#line 388 "..\\..\\..\\..\\Library\\CMSIS\\Include\\cmsis_armcc.h"
|__asm___6_main_c_87818743____REV16| PROC
#line 389

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___6_main_c_87818743____REVSH|
#line 402
|__asm___6_main_c_87818743____REVSH| PROC
#line 403

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***

                  __ARM_use_no_argv EQU 0
