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标题: UART0使用 64Bytes FIFO [打印本页]

作者: assman 时间: 2021-7-15 15:53
标题: UART0使用 64Bytes FIFO
各位大大安安,

官方TRM中提到NUC230/240的UART0有提供到64 Bytes的接收缓冲区，UART1及UART2只提供了16Bytes的接收缓冲区，但uart.h文件中RFITL设定仅供到14 Bytes
想问如果想使用64 Bytes FIFO该如何设定，谢谢

/*---------------------------------------------------------------------------------------------------------*/
/* UART FIFO size constants definitions                                                                   */
/*---------------------------------------------------------------------------------------------------------*/

#define UART0_FIFO_SIZE 64 /*!< UART0 supports separated receive/transmit 64/64 bytes entry FIFO */
#define UART1_FIFO_SIZE 16 /*!< UART1 supports separated receive/transmit 16/16 bytes entry FIFO */
#define UART2_FIFO_SIZE 16 /*!< UART2 supports separated receive/transmit 16/16 bytes entry FIFO */

/*---------------------------------------------------------------------------------------------------------*/
/* UA_FCR constants definitions                                                                         */
/*---------------------------------------------------------------------------------------------------------*/

#define UART_FCR_RFITL_1BYTE       (0x0 << UART_FCR_RFITL_Pos) /*!< UA_FCR setting to set RX FIFO Trigger Level to 1 bit */
#define UART_FCR_RFITL_4BYTES    (0x1 << UART_FCR_RFITL_Pos) /*!< UA_FCR setting to set RX FIFO Trigger Level to 4 bits */
#define UART_FCR_RFITL_8BYTES    (0x2 << UART_FCR_RFITL_Pos) /*!< UA_FCR setting to set RX FIFO Trigger Level to 8 bits */
#define UART_FCR_RFITL_14BYTES    (0x3 << UART_FCR_RFITL_Pos) /*!< UA_FCR setting to set RX FIFO Trigger Level to 14 bits */

#define UART_FCR_RTS_TRI_LEV_1BYTE       (0x0 << UART_FCR_RTS_TRI_LEV_Pos)  /*!< UA_FCR setting to set RTS Trigger Level to 1 bit */
#define UART_FCR_RTS_TRI_LEV_4BYTES    (0x1 << UART_FCR_RTS_TRI_LEV_Pos)  /*!< UA_FCR setting to set RTS Trigger Level to 4 bits */
#define UART_FCR_RTS_TRI_LEV_8BYTES    (0x2 << UART_FCR_RTS_TRI_LEV_Pos)  /*!< UA_FCR setting to set RTS Trigger Level to 8 bits */
#define UART_FCR_RTS_TRI_LEV_14BYTES    (0x3 << UART_FCR_RTS_TRI_LEV_Pos)  /*!< UA_FCR setting to set RTS Trigger Level to 14 bits */

作者: admin 时间: 2021-7-15 16:27
uart.h里宏定义没定时64字节的，可以直接写数字修改寄存器的值，也可以自己先添加上宏定义再调用

作者: admin 时间: 2021-7-15 16:27
#define UART_FCR_RFITL_64BYTES (0x6 << UART_FCR_RFITL_Pos) /*!< UA_FCR setting to set RX FIFO Trigger Level to 64 bits */

作者: assman 时间: 2021-7-15 17:47
了解，谢谢版大

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