/**************************************************************************//**
* @file main.c
* @version V3.00
* @brief Demonstrate how to use EPWM counter output waveform.
*
* @copyright (C) 2016 Nuvoton Technology Corp. All rights reserved.
******************************************************************************/
#include <stdio.h>
#include "NuMicro.h"
#define PLL_CLOCK 192000000
void SYS_Init(void)
{
/* Set XT1_OUT(PF.2) and XT1_IN(PF.3) to input mode */
PF->MODE &= ~(GPIO_MODE_MODE2_Msk | GPIO_MODE_MODE3_Msk);
/* Enable HXT clock (external XTAL 12MHz) */
CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
/* Wait for HXT clock ready */
CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
/* Set core clock as PLL_CLOCK from PLL */
CLK_SetCoreClock(PLL_CLOCK);
/* Set PCLK0 = PCLK1 = HCLK/2 */
CLK->PCLKDIV = (CLK_PCLKDIV_APB0DIV_DIV2 | CLK_PCLKDIV_APB1DIV_DIV2);
/* Enable IP module clock */
CLK_EnableModuleClock(EPWM0_MODULE);
/* EPWM clock frequency is set double to PCLK: select EPWM module clock source as PLL */
CLK_SetModuleClock(EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PLL, (uint32_t)NULL);
/* Enable UART module clock */
CLK_EnableModuleClock(UART0_MODULE);
/* Select UART module clock source as HXT and UART module clock divider as 1 */
CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART0SEL_HXT, CLK_CLKDIV0_UART0(1));
/* Update System Core Clock */
SystemCoreClockUpdate();
/* Set GPB multi-function pins for UART0 RXD and TXD */
SYS->GPB_MFPH &= ~(SYS_GPB_MFPH_PB12MFP_Msk | SYS_GPB_MFPH_PB13MFP_Msk);
SYS->GPB_MFPH |= (SYS_GPB_MFPH_PB12MFP_UART0_RXD | SYS_GPB_MFPH_PB13MFP_UART0_TXD);
// /* Set PE.2 multi-function pin for EPWM0 channel 2 */
SYS->GPE_MFPH = (SYS->GPE_MFPH & ~SYS_GPE_MFPH_PE8MFP_Msk) | SYS_GPE_MFPH_PE8MFP_EPWM0_CH0;
SYS->GPE_MFPH = (SYS->GPE_MFPH & ~SYS_GPE_MFPH_PE9MFP_Msk) | SYS_GPE_MFPH_PE9MFP_EPWM0_CH1;
/* Set PE.5 multi-function pin for EPWM0 channel 2 */
SYS->GPE_MFPL = (SYS->GPE_MFPL & ~SYS_GPE_MFPL_PE5MFP_Msk) | SYS_GPE_MFPL_PE5MFP_EPWM0_CH2;
SYS->GPE_MFPL = (SYS->GPE_MFPL & ~SYS_GPE_MFPL_PE4MFP_Msk) | SYS_GPE_MFPL_PE4MFP_EPWM0_CH3;
SYS->GPE_MFPL = (SYS->GPE_MFPL & ~SYS_GPE_MFPL_PE3MFP_Msk) | SYS_GPE_MFPL_PE3MFP_EPWM0_CH4;
SYS->GPE_MFPL = (SYS->GPE_MFPL & ~SYS_GPE_MFPL_PE2MFP_Msk) | SYS_GPE_MFPL_PE2MFP_EPWM0_CH5;
void UART0_Init()
{
/* Configure UART0 and set UART0 baud rate */
UART_Open(UART0, 115200);
}
int32_t main(void)
{
/* Init System, IP clock and multi-function I/O
In the end of SYS_Init() will issue SYS_LockReg()
to lock protected register. If user want to write
protected register, please issue SYS_UnlockReg()
to unlock protected register if necessary */
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, IP clock and multi-function I/O */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
/* Init UART to 115200-8n1 for print message */
UART0_Init();
/* EPWM0 channel 0~5 frequency and duty configuration are as follows */
EPWM_ConfigOutputChannel(EPWM0, 0, 360000, 90);
EPWM_ConfigOutputChannel(EPWM0, 1, 320000, 80);
EPWM_ConfigOutputChannel(EPWM0, 2, 250000, 75);
EPWM_ConfigOutputChannel(EPWM0, 3, 180000, 70);
EPWM_ConfigOutputChannel(EPWM0, 4, 160000, 60);
EPWM_ConfigOutputChannel(EPWM0, 5, 150000, 50);
/* Enable output of EPWM0 channel 0~5 */
EPWM_EnableOutput(EPWM0, 0x3F);
/* Start EPWM0 counter */
EPWM_Start(EPWM0, 0x3F);
while(1)
{
}
}
/*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/
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发表于 2023-11-3 17:40:57
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