UART疑问

void SYS_Init(void)
{
    /*---------------------------------------------------------------------------------------------------------*/
    /* Init System Clock                                                                                       */
    /*---------------------------------------------------------------------------------------------------------*/
    //CLK->PWRCON = (CLK->PWRCON & ~(0x0000000Dul)) | 0x0000001Dul;
    //CLK->PLLCON = (CLK->PLLCON & ~(0x000FFFFFul)) | 0x00004217ul;
    //CLK->CLKDIV = (CLK->CLKDIV & ~(0x00FF0F0Ful)) | 0x00000000ul;
    //CLK->CLKSEL0 = (CLK->CLKSEL0 & ~(0x0000003Ful)) | 0x0000003Aul;
    //CLK->CLKSEL1 = (CLK->CLKSEL1 & ~(0xF377773Ful)) | 0xAD8888FBul;
    //CLK->CLKSEL2 = (CLK->CLKSEL2 & ~(0x000300FCul)) | 0x000200ABul;
    //CLK->AHBCLK = (CLK->AHBCLK & ~(0x0000001Cul)) | 0x00000005ul;
    //CLK->APBCLK = (CLK->APBCLK & ~(0xD0F3337Dul)) | 0x00030004ul;
    //CLK->FRQDIV = (CLK->FRQDIV & ~(0x0000001Ful)) | 0x00000000ul;
    //SysTick->CTRL = (SysTick->CTRL & ~(0x00000005ul)) | 0x00000004ul;

    /* Unlock protected registers */
    SYS_UnlockReg();

    /* Enable clock source */
    CLK_EnableXtalRC(CLK_PWRCON_OSC10K_EN_Msk|CLK_PWRCON_OSC22M_EN_Msk|CLK_PWRCON_XTL12M_EN_Msk);

    /* Waiting for clock source ready */
    CLK_WaitClockReady(CLK_CLKSTATUS_OSC10K_STB_Msk|CLK_CLKSTATUS_OSC22M_STB_Msk|CLK_CLKSTATUS_XTL12M_STB_Msk);

    /* Disable PLL first to avoid unstable when setting PLL */
    CLK_DisablePLL();

    /* Set PLL frequency */
    CLK->PLLCON = (CLK->PLLCON & ~(0x000FFFFFul)) | 0x00004217ul;

    /* Waiting for PLL ready */
    CLK_WaitClockReady(CLK_CLKSTATUS_PLL_STB_Msk);

    /* If the defines do not exist in your project, please refer to the related clk.h in the clk_h folder appended to the tool package. */
    /* Set HCLK clock */
    CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_PLL, CLK_CLKDIV_HCLK(1));

    /* Enable IP clock */
    CLK_EnableModuleClock(ISP_MODULE);
    CLK_EnableModuleClock(TMR0_MODULE);
    //CLK_EnableModuleClock(UART0_MODULE);
    CLK_EnableModuleClock(UART1_MODULE);

    /* Set IP clock */
    CLK_SetModuleClock(TMR0_MODULE, CLK_CLKSEL1_TMR0_S_HXT, MODULE_NoMsk);
    //CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART_S_PLL, CLK_CLKDIV_UART(1));
    CLK_SetModuleClock(UART1_MODULE, CLK_CLKSEL1_UART_S_PLL, CLK_CLKDIV_UART(1));

    /* Update System Core Clock */
    /* User can use SystemCoreClockUpdate() to calculate SystemCoreClock. */
    SystemCoreClockUpdate();

    /* Lock protected registers */
    SYS_LockReg();
}

void IP_Init(void)
{
    /*---------------------------------------------------------------------------------------------------------*/
    /* Init TIMER Multi-function                                                                                 */
    /*---------------------------------------------------------------------------------------------------------*/
    /* Open Timer0 frequency to 1 Hz in periodic mode, and enable interrupt */
    TIMER_Open(TIMER0, TIMER_PERIODIC_MODE, 100);
    TIMER_EnableInt(TIMER0);

    /* Enable Timer0 NVIC */
    NVIC_EnableIRQ(TMR0_IRQn);

    /* Start Timer0 counting */
    TIMER_Start(TIMER0);

    /*---------------------------------------------------------------------------------------------------------*/
    /* Init I/O Multi-function                                                                                 */
    /*---------------------------------------------------------------------------------------------------------*/
    /* Set P3 multi-function pins for UART0 RXD, TXD */
    SYS->P3_MFP = SYS_MFP_P30_RXD0 | SYS_MFP_P31_TXD0;
               
    GPIO_SetMode(P3,BIT6,GPIO_PMD_OUTPUT);

    /* Set P1 multi-function pins for UART1 RXD and TXD */
    SYS->P1_MFP &= ~(SYS_MFP_P12_Msk | SYS_MFP_P13_Msk);
    SYS->P1_MFP |= (SYS_MFP_P12_RXD1 | SYS_MFP_P13_TXD1);

    /* Set P0 multi-function pins for UART1 RTS */
    SYS->P0_MFP = SYS->P0_MFP & (~SYS_MFP_P01_Msk) | SYS_MFP_P01_RTS1;

    /*---------------------------------------------------------------------------------------------------------*/
    /* Init UART                                                                                               */
    /*---------------------------------------------------------------------------------------------------------*/
    /* Reset UART1 module */
    SYS_ResetModule(UART1_RST);

    /* Configure UART1 and set UART1 Baudrate */
    UART_Open(UART1, 9600);

    /* Set RS485-Master as AUD mode */
    /* Enable AUD mode to HW control RTS pin automatically */
    /* You also can use GPIO to control RTS pin for replacing AUD mode*/
    UART_SelectRS485Mode(UART1, UART_ALT_CSR_RS485_AUD_Msk, 44);

    /* Set RTS pin active level as high level active */
    UART1->MCR &= ~UART_MCR_LEV_RTS_Msk;
    UART1->MCR |= UART_RTS_IS_HIGH_LEV_ACTIVE;

    /* Set UART parity as SPACE and ship baud rate setting */
    UART_SetLine_Config(UART1, 0, UART_WORD_LEN_8, UART_PARITY_NONE, UART_STOP_BIT_1);

}



void module_uart1 (void)
{
    unsigned char rxgroup[8] = {165,165,165,165,165,165,165,165};

    if (gcv_time_flag2&(1<<bit_time_flag2_1s_2))
    {
        gcv_time_flag2 &= ~(1<<bit_time_flag2_1s_2);

        /* Send data */
        UART_Write(UART1, rxgroup, 8);
    }
}

用逻辑分析仪观测TXD1,数据发送正常。


但是通过MAX1487，发送到PC上观测发现如上图数据。

请问我是哪里搞错了？

M051串口出来的数据正常，那就是MAX1487的问题了

发现一个问题，如上图，在每个字节的停止位之前，多传了一个BIT的1
但我检查了初始化是：
UART_SetLine_Config(UART1, 0, UART_WORD_LEN_8, UART_PARITY_NONE, UART_STOP_BIT_1);