#define EBI_TIMING_FASTEST      0x0UL /*!< EBI timing is the fastest \hideinitializer */ 
#define EBI_TIMING_VERYFAST     0x1UL /*!< EBI timing is very fast \hideinitializer */ 
#define EBI_TIMING_FAST         0x2UL /*!< EBI timing is fast \hideinitializer */ 
#define EBI_TIMING_NORMAL       0x3UL /*!< EBI timing is normal  \hideinitializer */ 
#define EBI_TIMING_SLOW         0x4UL /*!< EBI timing is slow \hideinitializer */ 
#define EBI_TIMING_VERYSLOW     0x5UL /*!< EBI timing is very slow \hideinitializer */ 
#define EBI_TIMING_SLOWEST      0x6UL /*!< EBI timing is the slowest \hideinitializer */ 
 
EBI_Open(EBI_BANK0, EBI_BUSWIDTH_16BIT, EBI_TIMING_NORMAL, 0, EBI_CS_ACTIVE_LOW); 
 
另外,这个还需要单独设置吗? 
#define EBI_MCLKDIV_1           0x0UL /*!< EBI output clock(MCLK) is HCLK/1 \hideinitializer */ 
#define EBI_MCLKDIV_2           0x1UL /*!< EBI output clock(MCLK) is HCLK/2 \hideinitializer */ 
#define EBI_MCLKDIV_4           0x2UL /*!< EBI output clock(MCLK) is HCLK/4 \hideinitializer */ 
#define EBI_MCLKDIV_8           0x3UL /*!< EBI output clock(MCLK) is HCLK/8 \hideinitializer */ 
#define EBI_MCLKDIV_16          0x4UL /*!< EBI output clock(MCLK) is HCLK/16 \hideinitializer */ 
#define EBI_MCLKDIV_32          0x5UL /*!< EBI output clock(MCLK) is HCLK/32 \hideinitializer */ 
#define EBI_MCLKDIV_64          0x6UL /*!< EBI output clock(MCLK) is HCLK/64 \hideinitializer */ 
#define EBI_MCLKDIV_128         0x7UL /*!< EBI output clock(MCLK) is HCLK/128 \hideinitializer */ 
 
 
 
 
 
 
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