请问初始化这样的写法哪里存在问题呢?我这样写,只能触发一次PDMA中断。 
 
void UART0_PDMA_Init_SCATTER(void) 
{         
    PDMA_Open(PDMA0, UART0_PDMA_OPENED_CH_RX); 
    PDMA_SetTransferMode(PDMA0, UART0_RX_DMA_CH, PDMA_UART0_RX, TRUE, (uint32_t)&UART0_DMA_DESC[0]); 
 
    UART0_DMA_DESC[0].ctl = \ 
                            ((UART0_RX_size / 2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Transfer count is RXBUFSIZE/2 */ \ 
                            PDMA_WIDTH_8 |    /* Transfer width is 8 bits */ \ 
                            PDMA_SAR_FIX |    /* Source increment size is  fixed(no increment) */ \ 
                            PDMA_DAR_INC |    /* Destination increment size is 8 bits */ \ 
                            PDMA_REQ_SINGLE | /* Transfer type is single transfer type */ \ 
                            PDMA_BURST_1 |    /* Burst size is 1. No effect in single transfer type */ \ 
                            PDMA_OP_SCATTER;  /* Operation mode is scatter-gather mode */ 
    /* Configure source address */ 
    UART0_DMA_DESC[0].src = (uint32_t)UART0_BASE; 
    /* Configure destination address */ 
    UART0_DMA_DESC[0].dest = (uint32_t)&UART0_RXBuffer[0];/*buffer 1 */ 
    /* Configure next descriptor table address */ 
    UART0_DMA_DESC[0].offset = (uint32_t)&UART0_DMA_DESC[1] - (PDMA0->SCATBA); /* next operation table is table 2 */ 
 
    UART0_DMA_DESC[1].ctl = \ 
                            ((UART0_RX_size / 2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Transfer count is RXBUFSIZE/2 */ \ 
                            PDMA_WIDTH_8 |    /* Transfer width is 8 bits */ \ 
                            PDMA_SAR_FIX |    /* Source increment size is fixed(no increment) */ \ 
                            PDMA_DAR_INC |    /* Destination increment size is 8 bits */ \ 
                            PDMA_REQ_SINGLE | /* Transfer type is single transfer type */ \ 
                            PDMA_BURST_1 |    /* Burst size is 1. No effect in single transfer type */ \ 
                            PDMA_OP_SCATTER;  /* Operation mode is scatter-gather mode */ 
    /* Configure source address */ 
    UART0_DMA_DESC[1].src = (uint32_t)UART0_BASE; 
    /* Configure destination address */ 
    UART0_DMA_DESC[1].dest = (uint32_t)&UART0_RXBuffer[UART0_RX_size / 2] ; /* buffer 2 */ 
    /* Configure next descriptor table address */ 
    UART0_DMA_DESC[1].offset = (uint32_t)&UART0_DMA_DESC[0] - (PDMA0->SCATBA); /* next operation table is table 1 */ 
 
 
    PDMA_SetTransferCnt(PDMA0,  UART0_RX_DMA_CH, PDMA_WIDTH_8, UART0_RX_size); 
    PDMA_SetTransferAddr(PDMA0, UART0_RX_DMA_CH, (uint32_t) (&UART0_RXBuffer[0]), PDMA_SAR_INC, (uint32_t) UART0_BASE, PDMA_DAR_FIX); 
    PDMA_SetBurstType(PDMA0, UART0_RX_DMA_CH, PDMA_REQ_SINGLE, 0); 
 
    /* Enable interrupt */ 
    PDMA_DisableInt(PDMA0, UART0_RX_DMA_CH, PDMA_INT_TEMPTY ); 
    PDMA_EnableInt(PDMA0, UART0_RX_DMA_CH, PDMA_INT_TRANS_DONE); /* channel transfer done */ 
    PDMA_EnableInt(PDMA0, UART0_RX_DMA_CH, PDMA_INT_TIMEOUT); /*channel timeout */ 
    PDMA_SetTimeOut(PDMA0, UART0_RX_DMA_CH, 1, UART0_t); /* channel 0 timeout period = CLK * TOC0  */ 
         
} 
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